Phase Change Memory Top Electrode Spacer Etch Mask
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Solution Overview
Problem
Phase change memory devices face challenges in achieving high integration due to non-uniform performance characteristics of the phase change layer resulting from inadequate overlap and etch losses during the formation of top electrode contacts, leading to increased contact resistance and potential electrical openness between bit lines and top electrodes.
Innovation Solution
A method involving the formation of top electrode contacts with spacers on both sidewalls, using these spacers as an etch mask to precisely etch the conductive and phase change layers, thereby ensuring stable and uniform overlap between top electrodes and phase change layers, reducing etch losses and composition changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the top electrode contacts are patterned to be much larger to increase overlap with top electrodes, then the electrical connection stability is improved, but the device area increases and integration level decreases
Solution Approach 1:
The patent applies preliminary action by forming spacers on the sidewalls of the insulation layer before etching the top electrode contacts. These spacers pre-establish the precise lateral boundaries that will define the contact dimensions, ensuring accurate overlap with top electrodes without requiring oversized contacts. This preliminary positioning structure enables precise electrical connection while maintaining compact device area.
2Area of stationary object
If the top electrode contacts are patterned to be smaller to reduce device area, then the integration level is improved, but the contact resistance increases and electrical connection becomes unstable
Solution Approach 1:
The patent introduces spacers as an intermediary element between the insulation layer and the top electrode contacts. These spacers act as a mediating structure that precisely defines the lateral boundaries of the contacts, ensuring optimal overlap with top electrodes. This intermediary positioning mechanism enables the formation of compact contacts with sufficient overlap area, achieving low contact resistance and stable electrical connection while maintaining reduced device area for high integration.
3Device complexity
If the overlap between top electrode contacts and top electrodes is insufficient, then the device complexity is reduced, but the phase change layer is inadvertently etched and performance becomes non-uniform
Solution Approach 1:
The patent replaces the conventional direct patterning approach with a spacer-based self-aligned etching process. Instead of relying solely on photolithographic alignment mechanics, the method uses spacer formation through deposition and anisotropic etching to mechanically define the contact boundaries. This substitution of the patterning mechanism ensures that the top electrode contacts automatically achieve the required overlap with top electrodes, preventing inadvertent etching of the phase change layer and maintaining uniform performance characteristics.
Data Source
AI summary
A method for manufacturing a phase change memory device that prevents or minimizes adverse performance characteristics associated with inadequate overlap between top electrode contacts and top electrodes. The method prevents or minimizes unwanted chemical changes and etch losses of the phase change material when building the top electrode. The method includes forming spacers on sidewalls of remaining portions of the insulation layer and the hard masks so that subsequent etching of the conductive layer and the phase change material layer uses the spacers and the hard masks as an etch mask to form top electrodes and a phase change layer. Accordingly, the method promises to provide a way of achieving a high level of integration for the resultant phase change memory devices.