Phase Change Memory Via Area Reduction via Oxidizable Spacer

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Solution Overview

Problem

In phase change memory cells, the current required to drive a change between states in the phase change material is proportionate to the volume of the material, making it desirable to form structures that require smaller volumes of phase change material for resistance storage.

Innovation Solution

A method for forming a memory cell structure that includes a bottom electrode, an oxidized insulator via with a Pilling-Bedworth ratio of at least one and one-half, and a phase change material within the via, where the via diameter is reduced by oxidizing the via spacer or sidewalls, thereby reducing the current needed to melt the phase change material.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the via diameter is reduced to minimize phase change material volume, then the current required to melt the material is reduced, but the manufacturing precision required to achieve such small dimensions increases

Engineering Contradiction:
Improvecurrent required to melt phase change materialVSAvoidvia diameter control
Core Design Contradiction:
Use of energy by moving objectVSManufacturing precision

Solution Approach 1:

An oxidizable insulator layer is introduced as an intermediary between the bottom electrode and the via opening. This layer is deposited with a thickness that is oxidized to reduce the effective via diameter. The oxidation process provides a controlled mechanism to achieve precise via dimension control that would be difficult to obtain through direct lithographic patterning alone.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The via dimensions are controlled by changing the oxidation state of the insulator layer. By controlling the oxidation process parameters (oxidation time, temperature, atmosphere), the effective via diameter can be precisely adjusted. This chemical transformation provides a controllable parameter change that enables precise via dimension control.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by stationary object

If the via area is reduced to decrease phase change material volume, then energy consumption is reduced, but the device complexity increases due to additional processing steps

Engineering Contradiction:
Improveenergy consumption of memory cellVSAvoidnumber of processing steps
Core Design Contradiction:
Use of energy by stationary objectVSDevice complexity

Solution Approach 1:

The via formation process is merged with the insulator layer deposition and oxidation processes. The oxidizable insulator layer is deposited as part of the existing insulator stack, and its oxidation is integrated into the overall via formation sequence. This merging of functions reduces the need for separate, dedicated via dimension control steps.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The oxidizable insulator layer is deposited in advance during the insulator stack formation, before the via opening is created. This preliminary action allows the via dimension to be controlled through subsequent oxidation rather than requiring precise lithographic patterning at the via formation stage, enabling better dimension control with standard processing tools.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The reduced via diameter minimizes the current required to melt the phase change material, enhancing the efficiency of phase change memory cells by reducing energy consumption.

Implementation Method 1

The first layer is electrically insulating when oxidized and has a Pilling-Bedworth ratio of at least one and one-half... oxidizing at least a portion of the via sidewall. The diameter of the via is reduced by expansion of the first layer during oxidation.

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

The first layer is electrically insulating when oxidized and has a Pilling-Bedworth ratio of at least one and one-half... The diameter of the via is reduced by expansion of the first layer during oxidation.

Methodology Applied
Scientific EffectPilling-Bedworth ratio expansion:

Data Source

PatentUS8338225B2Method to reduce a via area in a phase change memory cell
Publication Date: 2012.12.25 GLOBALFOUNDRIES US INC
  • US8338225B2 patent drawing
  • US8338225B2 patent drawing
  • US8338225B2 patent drawing

AI summary

A memory cell structure and method to form such structure. The method partially comprised of forming a via within an oxidizing layer, over the center of a bottom electrode. The method includes depositing a via spacer along the sidewalls of the via and oxidizing the via spacer. The via spacer being comprised of a material having a Pilling-Bedworth ratio of at least one and one-half and is an insulator when oxidized. The via area is reduced by expansion of the via spacer during the oxidation. Alternatively, the method is partially comprised of forming a via within a first layer, over the center of the bottom electrode. The first layer has a Pilling-Bedworth ratio of at least one and one-half and is an insulator when oxidized. The method also includes oxidizing at least a portion of the sidewalls of the via in the first layer.