PCM Write Control Circuit Using Data Compression to Cut Reset Power
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Solution Overview
Problem
Phase-change memory (PCM) devices consume significant power during write operations due to the difference in power consumption between set and reset operations, necessitating a reduction in the number of reset operations to minimize overall energy usage.
Innovation Solution
A phase-change memory controller employs a write control circuit that compresses incoming data, adds padding bits, and applies error correction coding to generate optimized write data, reducing the number of bits written and minimizing power consumption during write operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If data is written directly without compression to PCM device, then write operation is simple and fast, but power consumption increases due to more reset operations
Solution Approach 1:
The write control circuit performs data compression and padding operations before writing data to the PCM device. By preparing the data in advance with fewer significant bits through compression, the number of reset operations is reduced, thereby lowering power consumption while maintaining write functionality
2Loss of energy
If data compression is applied to reduce write bits, then power consumption decreases, but write control circuit complexity increases
Solution Approach 1:
The write control circuit is divided into distinct functional modules: a compression circuit that compresses input data to generate compressed data with fewer bits, and a padding circuit that adds padding bits to maintain the required data width. This segmentation allows each module to perform its specific function efficiently, reducing overall energy loss while managing complexity through modular design
3Adaptability or versatility
If more reset operations are performed, then data writing flexibility increases, but power consumption increases significantly
Solution Approach 1:
The patent changes the parameter of data representation by compressing data to reduce the number of bits that need to be written. The compression circuit transforms input data into compressed data with fewer significant bits, and the padding circuit adds necessary padding bits. This parameter change reduces the number of reset operations required, thereby reducing power consumption while maintaining data writing flexibility
Data Source
AI summary
A phase-change memory controller controls a phase-change memory device. The phase-change memory controller includes a write control circuit configured to receive first write data of “N” bits (where “N” is a natural number greater than 2) to be written to the phase-change memory device to generate second write data composed of compressed data compressed with “M” bits (where “N” is a natural number smaller than “N”) and “0” padding data in which the rest “N-M” bits are filled with “0”.


