Phase Change Memory Write Verification Stabilization
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Solution Overview
Problem
Phase change memory cells exhibit unstable resistance values immediately after writing, leading to inaccurate data reading due to transient resistance values being significantly lower than steady-state values, which complicates the verification process and increases the total time required for writing and verification operations.
Innovation Solution
A control method for non-volatile semiconductor devices that involves applying a stress to cells for a first time period until characteristics stabilize, followed by sequential writing and verification sequences, ensuring a longer time interval between writing and verification to allow resistance values to reach steady-state, thereby improving accuracy and reducing the overall time for write and verify operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If verification is performed immediately after writing to reduce total operation time, then productivity is improved, but measurement precision deteriorates due to transient resistance values being significantly lower than steady-state values
Solution Approach 1:
The patent introduces a preliminary waiting period (first time period) after writing before performing verification. This preliminary action allows the resistance value to stabilize from transient to steady-state, ensuring accurate verification without compromising productivity, as the waiting time is optimized to be the minimum necessary duration.
2Measurement precision
If a longer time interval is introduced between writing and verification to allow resistance stabilization, then measurement precision is improved, but productivity deteriorates due to increased total operation time
Solution Approach 1:
The patent optimizes the first time period parameter by determining it based on the relationship between current and time. This parameter optimization ensures that the waiting time is sufficient for resistance stabilization (improving verification accuracy) while being minimized to avoid excessive delays (maintaining productivity).
3Productivity
If multiple writing sequences are executed continuously to improve productivity, then productivity is improved, but reliability deteriorates because cell characteristics may not be stable for subsequent operations
Solution Approach 1:
The patent implements periodic verification operations interspersed among multiple writing sequences. Each verification operation is preceded by the optimized first time period waiting period, ensuring that cell characteristics are stable before each verification. This periodic structure maintains data integrity while allowing continuous high-productivity writing operations to proceed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the accuracy of verification operations and shortens the total time required for writing and verification by ensuring that resistance values stabilize before reading, thus maintaining data integrity and efficiency.
Implementation Method 1
Writing of data into a PCE is conducted by Joule heat generated by application of current
Implementation Method 2
When a PCE is heated to a temperature of a melting point or more and is then cooled at a comparatively fast speed, the PCE becomes amorphous (reset state) with a high resistance. When the PCE is held for a comparatively long period of time at a temperature not less than a crystallization temperature but not more than the melting point and is cooled at a comparatively slow speed, for example, the PCE has a crystallization state (set state) with a low resistance
Data Source
AI summary
A method includes temporarily storing write-data to be written into non-volatile memory cells, respectively, the memory cells being divided into cell groups, performing a first operation including write-phases performed in series and on an associated cell group and including applying a write-voltage to the memory cells belonging to the associated cell group in response to an associated write-data to be written into the memory cells belonging to the cell groups, and performing a second operation after the first operation is completed, which includes read-phases performed in series and on an associated cell group and including applying a first read-voltage to the memory cell or cells belonging to the associated one of the cell groups to produce first read-data therefrom, and comparing the first read-data with the write-data to be written into the memory cells belonging to the associated cell groups to produce comparison data.