Phase Change Memory Cell for XOR XNOR Logic
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor logic circuits face challenges in reducing the die footprint and number of components, particularly in implementing efficient exclusive or (XOR) and exclusive nor (XNOR) circuits using phase change memory (PCM) cells, which require multiple components and complex pulse management.
Innovation Solution
The design incorporates a semiconductor device with a single non-volatile PCM cell for XOR and XNOR circuits, utilizing concurrent write pulses and a read pulse to minimize component count and optimize die footprint, leveraging the phase change properties of chalcogenide materials like Ge2Sb2Te5 to transition between amorphous and crystalline phases for logical state storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If multiple PCM cells and complex circuit components are used to implement XOR and XNOR circuits, then the logical operation functionality is achieved, but the die footprint and component count increase
Solution Approach 1:
The patent merges multiple PCM cells and circuit components into a single non-volatile memory cell that performs both storage and XOR/XNOR logical operations. The memory cell is configured with specific circuitry that combines the functions of multiple components, reducing the overall component count while maintaining logical operation functionality through integrated design
Solution Approach 2:
The single non-volatile memory cell is designed to serve multiple functions: it acts as both a storage element and a logical operation unit for XOR and XNOR circuits. This multi-functional design eliminates the need for separate dedicated logic components, thereby reducing device complexity without sacrificing operational capability
2Device complexity
If multiple PCM cells and circuit components are used for XOR and XNOR circuits, then the logical operation functionality is achieved, but the die footprint increases
Solution Approach 1:
The patent merges multiple PCM cells and circuit components into a single non-volatile memory cell that performs both storage and XOR/XNOR logical operations. The memory cell is configured with specific circuitry that combines the functions of multiple components, reducing the overall component count while maintaining logical operation functionality through integrated design
Solution Approach 2:
The single non-volatile memory cell is designed to serve multiple functions: it acts as both a storage element and a logical operation unit for XOR and XNOR circuits. This multi-functional design eliminates the need for separate dedicated logic components, thereby reducing device complexity without sacrificing operational capability
3Productivity
If sequential write operations are used in PCM circuits, then the logical state is written to memory, but the processing cycles increase
Solution Approach 1:
The patent applies preliminary actions by concurrently preparing and applying multiple write pulses to the non-volatile memory cell before the logical write operation is complete. This allows the memory cell to receive all necessary input states simultaneously, enabling parallel processing of logical operations and reducing the total processing cycles required
4Productivity
If concurrent write pulses are applied to the non-volatile memory cell, then the processing cycles are reduced, but the pulse management complexity increases
Solution Approach 1:
The non-volatile memory cell is designed with self-service characteristics that automatically manage the concurrent write pulses. The circuitry within the memory cell handles the coordination and integration of multiple pulses without requiring external complex control mechanisms, thereby reducing processing cycles while minimizing pulse management complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the processing cycles and component count in XOR and XNOR circuits, enabling smaller die footprints and efficient logical state management by utilizing the high resistance contrast between amorphous and crystalline phases of PCM materials.
Implementation Method 1
Phase change memory (PCM) devices are non-volatile memory devices in which the state of the memory elements can be retained for days to decades without power consumption
Implementation Method 2
a bottom heater over the bottom electrode, a bottom buffer layer over the bottom heater
Data Source
AI summary
A phase change memory (PCM) device including a bottom electrode, a bottom heater over the bottom electrode, a bottom buffer layer over the bottom heater, a PCM region over the bottom buffer layer, a top buffer layer over the PCM region, a top heater over the top buffer layer, and a top electrode over the top heater.