Peak Current Mode Control Noise Immunity via DC Offset
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Solution Overview
Problem
Peak current mode control schemes in power converters face challenges with low signal-to-noise ratios and premature switch termination due to noise spikes from transformer winding capacitance and Schottky diodes, especially at minimum load and maximum line conditions, leading to unintended pulse skipping.
Innovation Solution
A current sense circuit with a filter resistor and capacitor, along with a main switch control node resistor, is used to enhance the signal-to-noise ratio by adding a DC-offset voltage only during the on-time of the main switch, allowing the filter capacitor to absorb spikes and eliminate leading-edge noise, thereby maintaining an ideal waveform and preventing pulse skipping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a filter resistor and capacitor are used to reduce noise spikes, then the signal-to-noise ratio is improved, but the leading-edge spike duration increases and may cause premature switch termination
Solution Approach 1:
The patent applies preliminary action by adding a DC-offset voltage to the current sense signal before it reaches the comparator. This offset is added in advance during the switch on-time, raising the entire signal level including the spike, so that the spike does not cause premature termination. The offset is removed after the spike period, allowing normal operation to resume.
Solution Approach 2:
The patent changes the voltage level parameter of the current sense signal by superimposing a DC-offset voltage. This parameter change elevates the signal level during the critical on-time period, transforming the effect of the spike from harmful (causing premature termination) to harmless (still below the elevated threshold).
2Measurement precision
If the current level is kept very low to maintain proper control, then the control precision is improved, but the signal becomes more susceptible to noise spikes
Solution Approach 1:
The patent applies preliminary anti-action by adding a DC-offset voltage that counteracts the harmful effect of noise spikes before they can cause premature switch termination. The offset creates a raised threshold that prevents the spikes from triggering false shutdown, thereby improving noise immunity without changing the actual current level or control precision.
3Reliability
If filtering is increased to eliminate spikes, then noise immunity is improved, but the response time of the current signal is reduced
Solution Approach 1:
The patent uses a DC-offset voltage as an intermediary element that mediates between the noisy current sense signal and the comparator threshold. Instead of heavily filtering the signal (which would slow response), the offset voltage raises the effective threshold, allowing the full-speed signal to pass through while preventing false triggering by spikes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively increases the signal-to-noise ratio, eliminating leading-edge spikes and preventing unintended pulse skipping across all operating conditions, ensuring reliable operation even at maximum line and minimum load conditions without requiring additional components like current transformers.
Implementation Method 1
a filter capacitor electrically coupled to the current sense input node
Implementation Method 2
a main switch control node resistor comprising a first terminal and a second terminal, the first terminal electrically coupled to the main switch control node, and the second terminal electrically coupled to the current sense input node
Data Source
AI summary
Systems and methods for providing peak current mode control (PCMC) for power converters. Noise immunity is improved by enhancing the signal-to-noise ratio of an inductor (or switch) current to achieve minimum duty cycle resolution and eliminate subharmonic operation that causes high input and output ripples. Current is sensed and translated to a voltage by a current sense resistor for peak current mode control scheme. A direct current (DC) offset voltage is added only during an on-time of the main switch to increase the signal-to-noise ratio. A leading-edge spike caused by turn-on of the main switch is removed by resetting a filter capacitor of a current sense circuit to zero volts after each switching cycle.