PCP Flow Merging in Network Flow Processors

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current Network Flow Processor (NFP) integrated circuits face challenges in efficiently managing multiple Priority Code Point (PCP) flows across physical MAC ports, leading to inefficiencies in virtual channel utilization and potential overloads, which affect network processing and throughput.

Innovation Solution

The NFP integrated circuit employs a PCP Remap LUT (PRLUT) and associated circuitry to merge or reorder PCP flows, utilizing dual linked lists and a link manager to optimize buffer allocation and generate Priority Flow Control (PFC) pause frames when overloads occur, ensuring efficient virtual channel usage and network processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple PCP flows are assigned to separate virtual channels for each physical MAC port, then network processing capability is improved, but the number of virtual channels required increases significantly (first number multiplied by eight)

Engineering Contradiction:
Improvenetwork processing capabilityVSAvoidnumber of virtual channels
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple PCP flows from different priority levels into a single shared virtual channel. Instead of allocating separate virtual channels for each PCP flow (which would require 8 virtual channels per physical MAC port), the invention combines multiple PCP flows and assigns them to shared virtual channels, reducing the total number of virtual channels needed while maintaining the ability to process multiple priority levels simultaneously

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If PCP flows are merged into fewer virtual channels, then virtual channel utilization is improved, but buffer management complexity increases

Engineering Contradiction:
Improvevirtual channel utilizationVSAvoidbuffer management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the buffer management system into port-specific enqueue engines and shared dequeue engines. Each port enqueue engine independently manages buffer allocation for its assigned PCP flows, while the shared dequeue engines handle buffer dequeuing for all virtual channels. This segmentation allows multiple PCP flows to share virtual channels without creating buffer management conflicts, as each port maintains its own buffer allocation independence

Inventive Principle:
Principle #1Segmentation

3Reliability

If PCP flows are assigned to dedicated virtual channels, then flow isolation is improved, but virtual channel overload is more likely to occur

Engineering Contradiction:
Improveflow isolationVSAvoidvirtual channel overload
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent combines multiple PCP flows into shared virtual channels, which distributes the traffic load across fewer channels. This merging approach prevents any single virtual channel from becoming overloaded with traffic from a single PCP flow, as the capacity of the shared virtual channel accommodates multiple flows. The flow isolation is maintained through the port-specific enqueue engines that track and manage buffers for each PCP flow independently

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9264256B2Merging PCP flows as they are assigned to a single virtual channel
Publication Date: 2016.02.16 NETRONOME SYSTEMS INC
  • US9264256B2 patent drawing
  • US9264256B2 patent drawing
  • US9264256B2 patent drawing

AI summary

A Network Flow Processor (NFP) integrated circuit receives, via each of a first plurality of physical MAC ports, one or more PCP (Priority Code Point) flows. The NFP also maintains, for each of a second plurality of virtual channels, a linked list of buffers. There is one port enqueue engine for each physical MAC port. For each PCP flow received via the physical MAC port associated with a port enqueue engine, the port enqueue engine causes frame data of the flow to be loaded into one particular linked list of buffers. Each port enqueue engine has a lookup table circuit that is configurable to cause multiple PCP flows to be merged so that the frame data for the multiple flows is all assigned to the same one virtual channel. Due to the PCP flow merging, the second number can be smaller than the first number multiplied by eight.