Phase Change Memory Bit Line Contact Structure
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Solution Overview
Problem
Conventional phase change random access memory (PRAM) devices face challenges in achieving high heating efficiency and reducing write current due to heat dissipation issues, which complicates the fabrication process and slows down write operations.
Innovation Solution
A non-volatile memory element with a three-dimensional structure where the bit line is in contact with the growth initiation surface of the recording layer, eliminating the need for a top electrode and reducing heat dissipation without increasing the recording layer thickness, thereby enhancing heating efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a top electrode with low thermal conductivity is used to cover the upper surface of the recording layer to reduce heat dissipation, then heating efficiency is improved, but device structure becomes more complex and fabrication process is complicated
Solution Approach 1:
The invention removes the top electrode from the device structure, extracting the heat dissipation problem from the structural solution space. Instead of adding a low thermal conductivity layer on top, the patent uses the bit line itself as the heating element that contacts the recording layer directly, eliminating the need for additional electrode layers and simplifying the overall device architecture.
Solution Approach 2:
The bit line serves dual functions: it acts as both the data transmission line and the heating element for phase change. By making the bit line directly contact the recording layer, it performs both electrical connection and thermal heating functions, eliminating the need for separate top electrode structures and reducing device complexity.
2Loss of energy
If the recording layer thickness is increased to reduce heat dissipation to the bit line, then heating efficiency is improved, but write voltage requirement increases and device performance deteriorates
Solution Approach 1:
Instead of increasing thickness (one dimension) to reduce heat dissipation, the invention changes the spatial arrangement by having the bit line contact the recording layer from the side/growth initiation surface. This dimensional reconfiguration allows heat to be applied more directly to the phase change material without requiring increased thickness, thereby maintaining efficient heating while avoiding the need for higher write voltages.
3Loss of energy
If conventional PRAM structure with top electrode is used, then heat dissipation is reduced, but fabrication process becomes complex and writing speed decreases
Solution Approach 1:
The top electrode is extracted from the device structure, simplifying the fabrication process by removing additional deposition and patterning steps. This structural simplification directly contributes to faster writing speed by reducing the thermal mass that needs to be heated and eliminating the thermal barrier introduced by additional layers.
Solution Approach 2:
The bit line is positioned to contact the growth initiation surface of the recording layer before the recording layer is fully formed. This preliminary positioning ensures that heat is applied directly to the phase change material from the beginning of the writing process, enabling faster phase transition and improving writing speed without requiring complex multi-layer structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for a decrease in write current and an increase in writing speed, simplifying the fabrication process while maintaining high heating efficiency.
Implementation Method 1
the storage of data is based on the phase state of phase change material contained in the recording layer. Specifically, there is a big difference between the electrical resistivity of the material in the crystalline state and the electrical resistivity in the amorphous state
Implementation Method 2
This phase change is effected by the phase change material being heated when a write current is applied
Implementation Method 3
the bit line is in contact with a growth initiation surface of the recording layer
Data Source
AI summary
A non-volatile memory element includes a bottom electrode 12, a bit line 14 provided on the bottom electrode 12, and a recording layer 15 containing phase change material connected between the bottom electrode 12 and the bit line 14. In accordance with this invention, the bit line 14 is in contact with a growth initiation surface 15a of the recording layer 15. This structure can be obtained by forming the bit line 14 before the recording layer 15, resulting in a three-dimensional structure. This decreases the area of contact between the recording layer 15 and the bit line 14, decreasing heat dissipation to the bit line 14 without increasing the thickness of the recording layer 15. With this three-dimensional structure, moreover, there is no top electrode between the bit line 14 and the recording layer 15, keeping down the complexity of the fabrication process.


