Buried N+ Layer Doping for PCRAM Leakage
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Solution Overview
Problem
Substrate leakage occurs in diode-selected phase change random access memory (PCRAM) due to vertical bipolar junction transistor (BJT) parasitic effects, degrading programming current and increasing power consumption.
Innovation Solution
Increasing the ion implant dosage for the buried N+ layer, adjusting the annealing process to widen the buried N+ layer, and increasing the thickness of the epitaxial semiconductor layer to reduce the parasitic BJT current gain and suppress substrate leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a dual shallow trench isolated epitaxial diode array is used to increase PCRAM density, then cell size is reduced and programming current is improved, but substrate leakage occurs due to vertical BJT parasitic effects
Solution Approach 1:
The patent changes the physical parameters of the semiconductor structure by increasing the thickness of the epitaxial semiconductor layer and adjusting the doping concentration of the buried N+ layer. These parameter changes increase the vertical distance and reduce the parasitic BJT current gain, thereby suppressing substrate leakage while maintaining the high-density diode array structure
Solution Approach 2:
The patent addresses the substrate leakage problem by extending the solution into the vertical dimension. By increasing the epitaxial layer thickness and manipulating the vertical doping profile of the buried N+ layer, the patent creates a longer vertical path that reduces the parasitic BJT effect, effectively suppressing substrate leakage without compromising the horizontal integration density
2Ease of manufacture
If ion implantation is performed on the buried N+ layer with standard dosage, then the layer is formed, but the parasitic BJT current gain remains high causing substrate leakage
Solution Approach 1:
The patent modifies the ion implantation parameters by increasing the dosage to greater than 1.0×10^14/cm². This parameter change increases the doping concentration in the buried N+ layer, which reduces the parasitic BJT current gain and suppresses substrate leakage while maintaining manufacturability through standard ion implantation processes
3Device complexity
If the epitaxial semiconductor layer is formed with standard thickness, then the device structure is completed, but the vertical BJT parasitic effects are not sufficiently suppressed
Solution Approach 1:
The patent solves the parasitic BJT problem by extending the epitaxial semiconductor layer thickness in the vertical dimension. This increased thickness creates a longer vertical path that reduces the parasitic BJT current gain, effectively suppressing substrate leakage while maintaining a relatively simple device structure without adding lateral complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively suppresses substrate leakage, improving programming current and reducing power consumption in PCRAM devices.
Implementation Method 1
performing ion implantation for the buried N+ layer, with an ion implant dosage larger than 1.0×1014/cm2
Implementation Method 2
forming an epitaxial semiconductor layer on the buried N+ layer through epitaxial deposition
Implementation Method 3
adjusting the annealing process to widen the buried N+ layer
Data Source
AI summary
A method of manufacturing a semiconductor device and a semiconductor device made by the method is disclosed. The method comprises forming a buried N+ layer in an upper portion of a P-type substrate; performing ion implantation on the buried N+ layer; annealing the buried N+ layer; forming an epitaxial semiconductor layer on the buried N+ layer through epitaxial deposition, wherein, an upper portion of said epitaxial semiconductor layer and a portion underlying said P+ region of said epitaxial semiconductor layer are doped to form a P+ region and an N− region, respectively. Increasing the ion implant dosage of the BNL layer, adjusting the method of annealing the BNL layer to increase the width of the BNL layer, or increasing the thickness of the EPI layer, reduces the vertical BJT current gain and suppressed the substrate leakage current.