Phase Change Memory Programming Control for Resistance Consistency
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Solution Overview
Problem
In semiconductor memory apparatuses, phase change memory cells with different programming characteristics exhibit inconsistent and unstable resistance values when programmed with the same current pulse, leading to variations in programmed resistance values.
Innovation Solution
A semiconductor memory apparatus that includes a first write control code generation unit to generate updated write control codes with varying cycles across multiple periods, and a data write unit to output programming current pulses corresponding to these codes, ensuring consistent programming of phase change memory cells with different characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the same programming current pulse is applied to phase change memory cells with different programming characteristics, then the programming process is simple and fast, but the resistance values become inconsistent and unstable
Solution Approach 1:
The patent applies dynamics by making the programming current pulse parameters variable rather than fixed. The current pulse magnitude and duration are dynamically adjusted based on the specific memory cell's characteristics, allowing the system to adapt to variations in programming behavior while maintaining consistent resistance values across different cells
Solution Approach 2:
The patent changes the parameters of the programming current pulse (magnitude and duration) to resolve the contradiction. By varying these parameters according to measured programming characteristics, the system achieves both reliable resistance values and maintains programming efficiency
2Reliability
If programming current pulse parameters are adjusted to stabilize resistance values, then reliability improves, but the programming process becomes more complex
Solution Approach 1:
The patent applies self-service by having the memory cell itself provide information about its programming characteristics through measurement. The system measures the programming behavior of each cell and uses this self-provided information to automatically determine the appropriate current pulse parameters, eliminating the need for external complex characterization procedures
Solution Approach 2:
The patent implements feedback by measuring the programming characteristics of each memory cell and using this measurement information to adjust subsequent programming operations. This closed-loop approach ensures consistent resistance values while keeping the control mechanism relatively simple through automated parameter selection
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution stabilizes the programming of phase change memory cells by adjusting the duration and magnitude of programming current pulses based on updated write control codes, thereby ensuring consistent resistance values across multiple memory cells.
Implementation Method 1
A PCRAM uses Joule heating generated when a current or voltage is applied to the phase change material (GST) to cause a reversible phase change of a phase change material (GST) between a crystalline state and an amorphous state
Implementation Method 2
A phase change material can change to an amorphous state or a crystalline state according to a temperature condition
Data Source
AI summary
A semiconductor memory apparatus includes: a first write control code generation unit configured to generate first write control codes which are updated with different cycles in a plurality of respective periods, in response to a programming verification flag signal and a programming enable signal, the first write control code generation unit determining the number of the plurality of periods depending upon a code value of the repetition times setting codes and an update cycle of the first write control codes in an initial period among the plurality of periods depending upon a code value of initial setting codes; and a data write unit configured to output a first programming current pulse with a magnitude corresponding to a code combination of the first write control codes which are updated.