Phase-change Memory Shielding Unit Suppresses Coupling Noise

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Solution Overview

Problem

Conventional semiconductor memory devices experience coupling noise during read-while-write operations due to the simultaneous application of different voltages on global bit lines, which can alter data values and reduce memory device reliability.

Innovation Solution

The semiconductor memory device includes a shielding unit or circuit between adjacent write and read global bit lines, with a ground or boosted voltage applied to the shielding unit, and local bit lines connected to both write and read global bit lines, allowing for the separation or grouping of global bit lines to minimize noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If read-while-write operation is implemented with global bit lines positioned close to each other, then memory access speed and integrity are improved, but coupling noise is generated due to simultaneous application of different voltages

Engineering Contradiction:
Improvememory access speedVSAvoidcoupling noise
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

A shielding unit is introduced as an intermediary element between the write global bit line and the read global bit line. This shielding unit acts as a mediator that blocks the harmful electromagnetic coupling noise while allowing the bit lines to remain in close proximity for high-speed operation. The shielding unit can be implemented using conductive materials or ground planes that intercept and dissipate the coupling noise.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The bit line structure is segmented into distinct write global bit lines and read global bit lines with separate voltage control paths. By segmenting the signal paths and applying different voltages to each segment independently, the coupling noise between the write and read operations is minimized while maintaining high-speed read-while-write functionality.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If different voltages are applied to write and read global bit lines simultaneously, then read-while-write operation functionality is achieved, but coupling noise changes data values and decreases reliability

Engineering Contradiction:
Improveread-while-write operation capabilityVSAvoiddata integrity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The shielding unit serves as a protective intermediary that allows simultaneous voltage application to write and read global bit lines while preventing the harmful interaction between these voltages. The shielding unit blocks the electromagnetic fields from coupling between the bit lines, thus preserving data integrity during read-while-write operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

Different voltage levels are applied locally to write global bit lines and read global bit lines independently. The shielding unit ensures that these local voltage differences do not create harmful coupling effects, allowing each bit line to operate with its optimal voltage for its specific function while maintaining overall system reliability.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively suppresses or prevents coupling noise during read-while-write operations, enhancing the reliability and integrity of phase-change memory devices by isolating the voltages applied to write and read operations.

Implementation Method 1

a shielding unit or circuit arranged between adjacent (or neighboring) write and read global bit lines

Methodology Applied
Scientific EffectElectrostatic shielding: Faraday Cage

Data Source

PatentUS7929337B2Phase-change random access memories capable of suppressing coupling noise during read-while-write operation
Publication Date: 2011.04.19 SAMSUNG ELECTRONICS CO LTD
  • US7929337B2 patent drawing
  • US7929337B2 patent drawing
  • US7929337B2 patent drawing

AI summary

A semiconductor memory device includes at least one write global bit line connected to a plurality of local bit lines and at least one read global bit line connected to the local bit lines. The phase-change memory device having the write global bit line and the read global bit line suppress coupling noise generated during a read-while-write operation.