PCS Idle Block Substitution for Low-Power RAN Links

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Solution Overview

Problem

Existing methods for reducing power consumption in Ethernet links are not applicable to Radio Access Network (RAN) applications due to the need for continuous link establishment, and typical power-saving techniques do not consider the latency and synchronization requirements of 5G fronthaul networks, leading to inefficient energy usage.

Innovation Solution

Implementing a method in the physical coding sublayer (PCS) to identify idle blocks in a digital data stream and replace them with low-transition blocks (LTBs), which include pattern information blocks, to reduce power consumption while maintaining synchronization and latency requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If links are always established to exchange control and data packets in RAN applications, then link availability is maintained, but power consumption increases

Engineering Contradiction:

Improvelink availabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system dynamically adjusts the transmission state by transitioning between active transmission mode and low-power idle mode based on traffic conditions. The PHY layer can switch between these states while maintaining link establishment, allowing the system to adapt power consumption to actual traffic needs without sacrificing link availability.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The invention implements periodic low-power idle (LPI) periods during which transmission is suspended but the link remains established. Control packets can still be exchanged during these periods, allowing the system to periodically reduce power consumption while maintaining essential link functionality and availability.

Inventive Principle:

Principle #19Periodic action

2Use of energy by moving object

If typical Ethernet power saving methods are used, then energy efficiency improves, but 5G synchronization and latency requirements are not met

Engineering Contradiction:

Improveenergy efficiencyVSAvoidsynchronization and latency requirements

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The invention introduces an intermediary mechanism at the PHY layer that bridges the gap between Ethernet power saving methods and 5G requirements. The LPI functionality acts as an intermediary that enables power saving while maintaining the synchronization and latency characteristics required by 5G, by ensuring that control packets can still be exchanged and that link timing is preserved during idle periods.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Use of energy by moving object

If idle periods are used to power down transport links, then power saving is achieved, but strict latency requirements of RAN networks are compromised

Engineering Contradiction:

Improvepower savingVSAvoidlatency

Core Design Contradiction:

Use of energy by moving objectVSLoss of time

Solution Approach 1:

The system dynamically controls the timing and duration of low-power idle periods to ensure they do not compromise latency requirements. By adjusting when and how long LPI periods occur based on traffic patterns and latency sensitivity, the system achieves power saving without introducing unacceptable delays in data transmission.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS20260113224A1Methods and apparatus of communicating in a physical coding sublayer

Publication Date: 2026.04.23 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)

AI summary

A method in a transmitter of a communications system, the transmitter comprising a physical coding sublayer, PCS, for transmitting data to a receiver, the method comprising: monitoring a digital data stream to identify PCS idle blocks in the digital data stream; generating substitute data blocks for transmitting to the receiver in place of the PCS idle blocks, the substitute data blocks comprising low transition blocks, LTBs, and one or more pattern information blocks.