PDCCH Repetition Processing Delay for Overlapping PDSCH Symbols

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Solution Overview

Problem

Current wireless communication systems lack an effective mechanism to determine processing delay for repetitive PDCCH repetitions, particularly when there is an overlapping PDCCH repetition and a scheduled PDSCH, which affects reliability and robustness in PDCCH decoding.

Innovation Solution

A baseband processor in wireless equipment is configured to monitor PDCCH repetition, determine a multiplexing pattern with PDSCH within an overlapping symbol, and calculate processing delay for decoding, considering various patterns and UE capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If PDCCH repetition is introduced to support low-latency and higher reliability communication, then reliability of PDCCH decoding is improved, but processing delay determination becomes complex and uncertain

Engineering Contradiction:

ImprovePDCCH decoding reliabilityVSAvoidprocessing delay determination complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the parameter of processing delay determination by introducing specific formulas that calculate processing delay based on the number of overlapping symbols between PDCCH repetition and PDSCH. This transforms the complex uncertainty into a deterministic calculation using parameters like numberOfOverlappingSymbols, which is derived from the multiplexing pattern and slot configuration.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent segments the processing delay determination into distinct cases based on the multiplexing pattern (interleaved or non-interleaved) and the relationship between PDCCH repetition and PDSCH timing. By dividing the problem into manageable segments with specific formulas for each case, the overall complexity is reduced while maintaining accuracy.

Inventive Principle:

Principle #1Segmentation

2Reliability

If the UE decodes more than one PDCCH to identify PDSCH resources, then reliability of resource identification is improved, but decoding latency increases

Engineering Contradiction:

ImprovePDSCH resource identification reliabilityVSAvoiddecoding latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by having the UE determine the multiplexing pattern and calculate the number of overlapping symbols between PDCCH repetition and PDSCH in advance. This preliminary determination allows the UE to prepare the processing delay calculation before actual decoding, reducing the effective latency while maintaining the reliability of decoding multiple PDCCH messages.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent introduces dynamic processing delay adjustment based on the actual multiplexing pattern observed. The processing delay is not fixed but dynamically calculated according to the number of overlapping symbols and the specific multiplexing configuration, allowing the system to adapt to different scenarios and minimize latency while ensuring reliable decoding.

Inventive Principle:

Principle #15Dynamics

3Productivity

If PDCCH and PDSCH are multiplexed in overlapping symbols, then resource utilization is improved, but processing delay determination becomes ambiguous

Engineering Contradiction:

Improveresource utilizationVSAvoidprocessing delay measurement precision

Core Design Contradiction:

ProductivityVSMeasurement precision

Solution Approach 1:

The patent resolves the ambiguity by introducing precise parameters to measure the overlap: numberOfOverlappingSymbols and specific timing relationships between PDCCH repetition and PDSCH. These parameters transform the ambiguous overlapping scenario into a quantifiable measurement that can be used in deterministic processing delay calculations.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent replaces the mechanical/physical concept of overlapping time slots with a systematic mathematical model that calculates processing delay based on the number of overlapping symbols. This substitution transforms an ambiguous temporal overlap problem into a precise computational problem with clear formulas for different multiplexing patterns.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12432749B2Method for processing delay for PDCCH repetitions

Publication Date: 2025.09.30 APPLE INC

AI summary

Disclosed are methods and apparatus to process delay for PDCCH repetition. A transmission of a physical downlink control channel (PDCCH) repetition may be monitored. A multiplexing pattern of the PDCCH repetition and a physical downlink shared channel (PDSCH) within an overlapping symbol may be determined. A processing delay for a decoding of the PDCCH repetition, a decoding of the scheduled PDSCH, and an acknowledgement (ACK) preparation based on the multiplexing pattern of the PDCCH repetition and the PDSCH within the overlapping symbol may be determined. The PDSCH may be monitored after receiving the PDCCH repetition.