Peak Current Management in Multi-Die Non-Volatile Memory

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Solution Overview

Problem

Non-volatile memory devices face limitations in operating multiple chips in parallel due to peak current fluctuations, which can exceed power supply capabilities, leading to voltage droops and operation failures, restricting performance enhancements.

Innovation Solution

A non-volatile memory system with arbitration logic that assigns current indices to each memory array based on expected current demand, allowing selective pausing of operations to maintain peak current levels within supply limits, enabling more chips to operate concurrently while minimizing performance penalties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If more memory chips are operated in parallel to increase performance, then productivity is improved, but peak current levels exceed power supply capabilities leading to voltage droops and operation failures

Engineering Contradiction:

ImproveperformanceVSAvoidoperation stability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The system dynamically adjusts the number of concurrently operating memory chips based on real-time current consumption monitoring. The controller chip varies the degree of parallelism adaptively, allowing more chips to operate when current levels are low and reducing concurrent operations when current approaches supply limits, thus resolving the contradiction between productivity and reliability

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameters by adjusting the number of active memory chips in parallel. This parameter modification allows the system to optimize performance while staying within power supply capabilities, preventing voltage droops and ensuring stable operation

Inventive Principle:

Principle #35Parameter changes

2Reliability

If the number of concurrently operated memory chips is limited to avoid peak current exceeds, then reliability is maintained, but productivity is restricted

Engineering Contradiction:

Improveoperation stabilityVSAvoidperformance

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

Rather than using a fixed limit on concurrent operations, the system employs dynamic adjustment of the number of active chips based on monitored current consumption. This allows the system to maximize productivity while maintaining reliability by adapting to real-time power supply conditions

Inventive Principle:

Principle #15Dynamics

3Speed

If more memory chips are operated in parallel, then data transfer speed is improved, but voltage droops occur due to excessive peak current demand

Engineering Contradiction:

Improvedata transfer speedVSAvoidvoltage droop

Core Design Contradiction:

SpeedVSObject-affected harmful factors

Solution Approach 1:

The controller chip monitors current consumption from memory chips and uses this feedback to adjust the number of concurrently operating chips. This feedback mechanism prevents voltage droops by reducing concurrent operations when current demand approaches supply capabilities, while still allowing high-speed parallel operation when conditions permit

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS9329986B2Peak current management in multi-die non-volatile memory devices

Publication Date: 2016.05.03 SANDISK TECHNOLOGIES LLC

AI summary

Techniques are presented to operate a greater number of dice in parallel while not exceeding peak current limits. The device can arbitrate between multiple dice and, when needed, suspend operations on one or more dice in a way to average the chance of performance penalty so that all chips will proceed with write at an equal probability. In other aspects, the suspension of operations can be weighted based on factors such as the relative speed of the different dice or differing loads.