Differential Peak Detector With Common-Mode Flicker Noise Cancellation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing peak detector circuits are compromised by DC noise, particularly flicker noise, which affects the accuracy of their output, and existing mitigation techniques either increase costs or reduce operational speed, or fail to adequately reduce noise levels.

Innovation Solution

A circuit design that includes a differential input, a common mode detection circuit, a primary signal circuit, a replica block, and a summer to offset correlated flicker noise, using a common mode voltage to reduce noise in the peak detector output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If higher area devices are used in the circuit block preceding the peak detector to reduce flicker noise, then noise reduction is improved, but device area increases and operational speed decreases

Engineering Contradiction:
Improveflicker noiseVSAvoidoperational speed
Core Design Contradiction:
Object-affected harmful factorsVSSpeed

Solution Approach 1:

The circuit is divided into multiple functional blocks: a first differential circuit for peak detection, a common mode detection circuit for noise detection, and a summer for combining signals. This segmentation allows each block to be optimized independently, enabling noise reduction without sacrificing speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The common mode detection circuit extracts the flicker noise component from the differential input signal by detecting the common mode voltage. This extracted noise signal is then processed separately and subtracted from the peak detector output, removing the harmful noise without affecting the main signal path speed.

Inventive Principle:
Principle #2Taking out (Extraction)

2Object-affected harmful factors

If higher area devices are used in the circuit block preceding the peak detector to reduce flicker noise, then noise reduction is improved, but manufacturing cost increases

Engineering Contradiction:
Improveflicker noiseVSAvoidmanufacturing cost
Core Design Contradiction:
Object-affected harmful factorsVSEase of manufacture

Solution Approach 1:

The common mode detection circuit uses a replica of the first differential circuit's topology (with transistors M20-M23 mirroring M2-M5) to generate a noise signal that matches the actual noise characteristics. This copying approach allows accurate noise modeling using standard-sized devices rather than requiring larger, more expensive noise-reduction devices.

Inventive Principle:
Principle #26Copying

3Object-affected harmful factors

If common mode voltage injection is used to reduce flicker noise, then some noise reduction is achieved, but flicker noise effect is not reduced to a satisfactory level

Engineering Contradiction:
Improveflicker noiseVSAvoidnoise reduction effectiveness
Core Design Contradiction:
Object-affected harmful factorsVSMeasurement precision

Solution Approach 1:

The common mode detection circuit continuously monitors the common mode voltage at the differential input and uses this feedback to dynamically adjust the noise compensation signal. The summer combines the peak detector output with the inverted noise signal, creating a closed-loop system that actively cancels flicker noise throughout operation, achieving satisfactory noise reduction levels.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The output signal is formed by combining two distinct signal components: the peak detector DC output and the common mode noise signal (after inversion). This composite signal approach allows the beneficial peak detection function to coexist with active noise cancellation, achieving both accurate peak measurement and satisfactory flicker noise reduction simultaneously.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS11323103B2Peak detector
Publication Date: 2022.05.03 TEXAS INSTRUMENTS INC
  • US11323103B2 patent drawing
  • US11323103B2 patent drawing
  • US11323103B2 patent drawing

AI summary

A circuit with a differential input configured to receive a differential analog input signal. The circuit also includes a common mode detection circuit, a primary signal circuit coupled, and a replica block. The circuit also includes a summer coupled to the output of the primary signal circuit and to an output of the replica block.