PEALD Bonding Layers for Stacked Transistors Without Oxidation
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Solution Overview
Problem
As semiconductor devices advance to smaller feature sizes, challenges such as oxidation and inter-diffusion of layers in epitaxial stacks occur during bonding processes, affecting the integrity and performance of stacked transistor structures.
Innovation Solution
The use of plasma enhanced atomic layer deposition (PEALD) for forming bonding layers and surface plasma treatment at lower temperatures prevents unwanted oxidation and inter-diffusion, allowing for more reliable bonding without the need for high-temperature processes like UV curing or annealing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If high-temperature bonding processes (UV curing or annealing) are used, then bonding strength is improved, but oxidation and inter-diffusion of layers occur affecting layer integrity
Solution Approach 1:
The patent changes the temperature parameter from high-temperature (UV curing or annealing) to low-temperature plasma processing. This parameter change enables bonding to occur at lower temperatures that do not cause oxidation or inter-diffusion of the semiconductor layers, while still achieving sufficient bonding strength through the plasma activation process.
Solution Approach 2:
The patent employs plasma processing in a controlled inert or reduced-pressure environment. This creates an atmosphere that prevents oxidation of the bonding surfaces and eliminates the harmful effects of oxygen exposure during the bonding process, while the plasma itself provides the necessary activation for strong bonding.
2Productivity
If minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but additional problems such as oxidation and inter-diffusion arise
Solution Approach 1:
The patent changes the processing temperature parameter to low-temperature plasma processing. This enables the fabrication of highly integrated structures with small minimum feature sizes without triggering oxidation or inter-diffusion problems that would otherwise occur at higher temperatures, thus maintaining both high integration density and layer integrity.
3Object-affected harmful factors
If low-temperature plasma processing is used, then oxidation and inter-diffusion are prevented, but bonding strength may be compromised
Solution Approach 1:
The patent replaces traditional thermal bonding mechanisms (heat-driven UV curing or annealing) with plasma-based bonding. The plasma provides chemical activation and surface modification that enables strong bonding at low temperatures, substituting the thermal field with a plasma field that achieves bonding without causing oxidation or inter-diffusion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and performance of stacked transistor structures by preventing oxidation and inter-diffusion, maintaining the integrity of semiconductor layers and improving the bonding process, which is critical for advanced IC technology nodes like 3 nm and below.
Implementation Method 1
The use of plasma enhanced atomic layer deposition (PEALD) for forming bonding layers and surface plasma treatment at lower temperatures prevents unwanted oxidation and inter-diffusion
Implementation Method 2
The use of plasma enhanced atomic layer deposition (PEALD) for forming bonding layers and surface plasma treatment at lower temperatures prevents unwanted oxidation and inter-diffusion
Data Source
AI summary
A method includes the following steps. A transistor including a first gate structure is formed on a first substrate. A first dielectric layer is deposited over the transistor using plasma enhanced atomic layer deposition (PEALD). A multilayer stack is formed on a second substrate. The multilayer stack comprises alternately stacked semiconductor layers and sacrificial layers. A second dielectric layer is deposited over the multilayer stack using a plasma enhanced atomic layer deposition (PEALD). The second dielectric layer is bonded with the first dielectric layer. The sacrificial layers are replaced with a second gate structure.