Power Electronic Converter Current Limiting Across Dual Time Scales

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Solution Overview

Problem

Power electronic converter devices (PECDs) face challenges in safely operating during fault conditions, particularly in limiting maximum valve currents to avoid damage, as they differ significantly from conventional synchronous machines in over-circuit capability, and existing current limitation strategies may lead to distortions or temporary block modes.

Innovation Solution

A coordinated current limiter function is implemented, reducing current through PECDs in a smooth manner by executing multiple measures over different time intervals, with varying aggressiveness, while maintaining balanced leg DC voltages and outer loop stability, allowing the PECD to operate within its current capability without entering temporary block mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional current limitation strategies are applied to PECDs during faults, then current is reduced, but distortions occur or temporary block mode is entered

Engineering Contradiction:
Improvesafe operation of PECDVSAvoidcurrent distortions
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The current limitation is divided into multiple independent control loops with different time constants. The fast control loop (inner loop) responds immediately to current deviations, while the slow control loop (outer loop) provides gradual adjustment. This segmentation allows each loop to operate within its optimal response range without causing distortions, resolving the contradiction between rapid current reduction and distortion-free operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The control system dynamically adapts its response characteristics by using nested loops with different time constants. The inner loop provides aggressive correction for rapid changes, while the outer loop ensures smooth transitions and prevents overshoot. This dynamic multi-timescale control enables the system to limit current effectively while maintaining waveform quality and avoiding temporary block mode.

Inventive Principle:
Principle #15Dynamics

2Speed

If fast current reduction is implemented during faults, then current is limited quickly, but control stability may be compromised

Engineering Contradiction:
Improvecurrent reduction speedVSAvoidcontrol stability
Core Design Contradiction:
SpeedVSStability of the object's composition

Solution Approach 1:

The control system is segmented into fast inner loops and slow outer loops, each handling different aspects of current limitation. The inner loops provide rapid response to immediate threats, while the outer loops ensure gradual stabilization. This temporal segmentation resolves the contradiction by allowing fast action where needed while maintaining overall stability through slower, more deliberate control.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple feedback loops with different time constants continuously monitor system state and adjust control actions accordingly. The fast feedback ensures immediate correction of current deviations, while slow feedback prevents overshoot and maintains stability. This multi-layered feedback mechanism enables both rapid current reduction and sustained control stability during fault conditions.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP4485733A1Method for operating a power electronic converter device, a control device for operating a power electronic converter device and a grid control system
Publication Date: 2025.01.01 HITACHI ENERGY LTD
  • EP4485733A1 patent drawingFigure 1
  • EP4485733A1 patent drawingFigure 2
  • EP4485733A1 patent drawingFigure 3

AI summary

According to an embodiment, the method for operating a power electronic converter device (1) comprises the steps of providing fault information (I) which is representative of whether a fault appears in a grid connected with the power electronic converter device. If this is the case, a first measure (M1) is executed over a first time interval (T1), wherein the first measure is configured to reduce the current (iValve) through the power electronic converter device. Furthermore, also a second measure (M2) is executed over a second time interval (T2), wherein the second measure is also configured to reduce the current through the power electronic converter device. The first measure is faster in reducing the current through the power electronic converter device than the second measure. The second time interval is longer than the first time interval.