Pensando Tree LPM Lookup for Scalable Network Processing
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Solution Overview
Problem
Current network systems face challenges in providing flexible network interfaces to adapt to changes in device structure, protocols, and protocols, and they struggle with high CPU usage due to increased network complexity, especially with the introduction of overlay tunneling protocols and virtual switching, leading to inefficiencies in CPU resource allocation and memory usage.
Innovation Solution
A programmable IO device employing a Pensando Tree architecture with multiple cascading stages, each performing arithmetical operations, and a match processing unit, which sorts range-based elements, generates interval tables, and compresses data into cache-lines to optimize memory access and reduce memory requirements, allowing for efficient longest prefix match lookups without storing memory addresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If network interfaces are made flexible to adapt to changes in device structure and protocols, then adaptability is improved, but device complexity increases
Solution Approach 1:
The patent implements a programmable IO device where the control structure can be dynamically reconfigured through software loading. The device transitions from a fixed control structure to a dynamic one where control logic can be updated without hardware changes, resolving the contradiction between adaptability and complexity by making the system configurable rather than static
Solution Approach 2:
The programmable IO device serves multiple functions including network interface control, packet processing, and protocol adaptation within a single unified architecture. This universal device replaces multiple specialized fixed-function devices, improving adaptability while managing complexity through consolidation
2Adaptability or versatility
If network processing functions are performed in software to provide flexibility, then adaptability is improved, but CPU usage increases
Solution Approach 1:
The patent introduces a programmable IO device as an intermediary between the CPU and network interface. This mediator handles network processing tasks that would otherwise require full CPU intervention, reducing CPU usage while maintaining flexibility through programmable control logic in the intermediate device
Solution Approach 2:
The system segments network processing functions between the programmable IO device and the CPU. The IO device handles lower-level packet processing and control, while the CPU focuses on higher-level application tasks, dividing the workload to reduce overall CPU consumption while maintaining system flexibility
3Use of energy by moving object
If fixed-function offload technologies are used to reduce CPU load, then CPU usage is reduced, but adaptability deteriorates
Solution Approach 1:
The programmable IO device uses dynamic configuration where control logic can be reloaded and reprogrammed to perform different network functions. This dynamic approach allows the device to adapt to changing requirements while still offloading processing from the CPU, unlike static fixed-function devices
4Ease of manufacture
If traditional LPM lookup methods are used in distributed systems, then implementation is simplified, but scalability deteriorates
Solution Approach 1:
The patent segments the LPM lookup operation into distributed components where each node maintains a portion of the routing information. This segmentation allows the system to scale by adding more nodes, each handling local lookups, while maintaining implementation simplicity through standardized node behavior and modular architecture
Data Source
AI summary
Described are programmable IO devices configured to perform operations. These operations comprise: determining a set of range-based elements for a network; sorting the set of range-based elements according to a global order among the range-based elements; generating an interval table from the sorted range-based elements; generating an interval binary search tree from the interval table; propagating data stored in subtrees of interior stages of the interval binary search tree to subtrees of a last stage of the interval binary search tree such that the interior stages do not comprise data; converting the interval binary search tree to a Pensando Tree; compressing multiple levels of the Pensando Tree into cache-lines; and assembling the cache-lines in the memory unit such that each stage can compute an address of a next-cache line to be fetched by a next stage.


