Per Core Performance States for Power Optimization
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Solution Overview
Problem
The increasing power requirements and energy consumption in multi-core integrated circuits, due to all cores operating at a common voltage and frequency, lead to inefficiencies and higher cooling costs, especially when not all cores are equally loaded, necessitating a solution for per core performance states to conserve energy.
Innovation Solution
The implementation of fully integrated voltage regulators (FIVR) within processors allows for independent configuration of each core's voltage and frequency, enabling per core performance states (PCPS) that can operate at different power and thermal constraints, reducing overall power consumption by allowing cores to adjust their performance states independently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If all cores operate at a common voltage and frequency point, then system simplicity is maintained, but power consumption increases when cores are not equally loaded
Solution Approach 1:
The patent segments the previously unified core control into individual per-core control. Each core can now independently select its performance state (P-state) based on its specific workload requirements, rather than all cores being forced to operate at the same voltage and frequency. This segmentation enables differentiated power management where lightly loaded cores can operate at lower power states while heavily loaded cores maintain higher performance states.
Solution Approach 2:
The patent implements dynamic performance state selection for each core based on real-time workload conditions. The system continuously monitors core utilization and dynamically adjusts the voltage and frequency of individual cores by selecting appropriate P-states, allowing the system to adapt power consumption to actual computational demands rather than maintaining a static common operating point.
2Productivity
If all cores operate at maximum frequency requested by active threads, then performance is maximized, but cooling costs increase due to higher power consumption
Solution Approach 1:
The patent changes the operating parameters (voltage and frequency) of individual cores by selecting different performance states. Instead of all cores operating at maximum frequency, the system adjusts voltage and frequency parameters dynamically based on workload, allowing cores to operate at optimal points that balance performance requirements with power consumption and thermal management.
3Ease of operation
If a common performance state is used for all cores, then system management is simplified, but battery life decreases due to unnecessary power consumption
Solution Approach 1:
The patent enables each core to self-regulate its performance state based on its own workload characteristics. The per-core performance state selection allows cores to autonomously determine their optimal operating point, with the system managing power distribution dynamically rather than enforcing a uniform state, thereby extending battery life through intelligent local decision-making.
Data Source
AI summary
A method and apparatus for per core performance states in a processor. Per Core Performance States (PCPS) refer to the parallel operating of individual cores at different voltage and/frequency points. In one embodiment of the invention, the processor has a plurality of processing cores and a power control module that is coupled with each of the plurality of processing cores. The power control module facilitates each processing core to operate at a different performance state from the other processing cores. By allowing its cores to have per core performance state configuration, the processor is able to reduce its power consumption and increase its performance.