Per-Core Power Management Unit for Processor Frequency Control
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Solution Overview
Problem
Current CPU technologies face challenges in managing per-core performance states efficiently, leading to performance degradation and inefficiency due to thread dependencies and the need for balancing power consumption and performance across multiple cores.
Innovation Solution
The implementation of a power management unit (PMU) that automatically selects per-core performance states based on workload and energy/performance preference settings, allowing for flexible power management across cores while considering interdependencies between threads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a monolithic P-state model is used where all cores use the same P-state, then device complexity is reduced and ease of operation is improved, but power consumption efficiency deteriorates and performance optimization is limited
Solution Approach 1:
The patent divides the monolithic P-state control into per-core P-state control, where each core can independently select and transition to different P-states based on its workload requirements. This segmentation allows the system to optimize power consumption for each core individually rather than forcing all cores to use the same P-state, thereby resolving the contradiction between simplified control and power efficiency.
Solution Approach 2:
The patent enables each core to have its own P-state settings independent of other cores, allowing local optimization of performance and power consumption for each core based on its specific workload characteristics. This local quality approach permits different cores to operate at different P-states simultaneously, improving overall power efficiency without requiring complex centralized coordination.
2Use of energy by moving object
If per-core P-state selection is implemented to optimize power efficiency, then power consumption efficiency is improved, but device complexity increases and coordination overhead increases
Solution Approach 1:
The patent implements autonomous P-state selection at each core, where cores independently determine their own P-states based on workload conditions without requiring complex centralized coordination. This self-service mechanism reduces the coordination overhead and management complexity that would otherwise accompany per-core P-state control, while still achieving power efficiency improvements.
3Productivity
If per-core P-state optimization is implemented, then productivity is improved through better performance-power balance, but device complexity increases
Solution Approach 1:
The patent introduces dynamic P-state selection capability at each core, allowing cores to transition between different P-states based on real-time workload conditions. This dynamic approach enables the system to adaptively optimize the performance-power balance for each core independently, improving productivity while avoiding the need for static, pre-configured P-state assignments that would increase complexity.
Data Source
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AI summary
A processor comprises multiple cores and power management control logic to determine (a) a preliminary frequency for each of the cores and (b) a maximum frequency, based on the preliminary frequencies. The power management control logic is also to determines a dynamic tuning frequency, based on the maximum frequency and a reduction factor. In response to the dynamic tuning frequency for a selected core being greater than the preliminary frequency for that core, the power management control logic is to set the core to a frequency that is at least equal to the dynamic tuning frequency. In response to the preliminary frequency for the selected core being greater than the dynamic tuning frequency for that core, the power management control logic is to set the core to a frequency that is at least equal to the preliminary frequency. Other embodiments are described and claimed.