Per-Core Thermal Mitigation for Multi-Core Processor Hotspots
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Solution Overview
Problem
Current thermal management systems for multi-core processors penalize all cores when thermal mitigation is needed for a single core, leading to detrimental impact on overall performance due to shared power rails without identifying the specific cause of temperature increase.
Innovation Solution
Implementing digital activity sensors in each processing core to identify the core responsible for temperature rise and apply targeted thermal mitigation by reducing digital activity, such as inserting idle instructions, rather than uniformly reducing clock frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If uniform thermal mitigation is applied to all cores when temperature increases, then thermal management is achieved, but overall processor performance deteriorates due to unnecessary throttling of unaffected cores
Solution Approach 1:
The patent segments the thermal management approach by implementing per-core temperature monitoring and activity reduction. Instead of applying uniform thermal mitigation to the entire processor, the system divides the processor into individual cores, each with its own temperature sensor and activity control mechanism. This allows targeted thermal management where only the specific core experiencing thermal issues has its activity reduced, while other cores continue operating at full performance.
Solution Approach 2:
The patent applies local quality by implementing differentiated thermal mitigation strategies for different cores based on their individual thermal conditions. Each core is monitored independently, and activity reduction is applied locally only to the affected core rather than globally across the entire processor. This ensures that thermal management is tailored to the specific needs of each core, preserving overall processor performance.
2Temperature
If digital activity is reduced in the affected core, then temperature increase is mitigated, but performance of that specific core decreases
Solution Approach 1:
The patent applies partial action by reducing digital activity only to the extent necessary to mitigate thermal issues in the affected core. Rather than completely shutting down the core or applying uniform throttling, the system selectively reduces activity in specific processing stages or instructions within the affected core, applying just enough mitigation to control temperature while preserving as much performance as possible.
3Measurement precision
If per-core thermal monitoring is implemented, then targeted thermal mitigation is achieved, but system complexity increases due to additional sensors and control logic
Solution Approach 1:
The patent manages complexity by segmenting the monitoring system into modular per-core temperature sensors and control logic. Each core has its own temperature sensor and activity control mechanism, allowing independent operation and simplifying the overall system architecture. This modular approach makes the system easier to implement and maintain compared to a complex centralized thermal management system.
Solution Approach 2:
The patent implements self-service by enabling each core to autonomously monitor its own temperature and apply its own activity reduction when needed. The per-core temperature sensors and control logic allow each core to independently manage its thermal condition without requiring complex centralized control, reducing overall system complexity while improving measurement precision.
Data Source
AI summary
A system for performing thermal mitigation in a multi-core processor determines which processing core(s) of the processor is responsible for causing the temperature to rise to an undesired level and then performs one or more thermal mitigation steps only in the responsible core to avoid degrading performance of the other cores. The system monitors digital activity (DA) of the pipeline stages of the cores, determines when the DA of a processing stage has caused temperature to rise to a particular level and then reduces the DA of at least one processing stage of the responsible core in order to reduce temperature. The system can also take one or more other thermal mitigation steps based on monitored temperature values, such as reducing clock frequency or selecting a different V/F corner of the responsible core.