Per-Core Voltage Configuration for Multicore SoC Reliability
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Solution Overview
Problem
Conventional multicore processor SoCs are limited in managing manufacturing variations, as they treat all cores as single-core devices, leading to inefficient voltage configuration, which results in accelerated reliability degradation, increased heat, and the need for aggressive cooling solutions.
Innovation Solution
Providing external access to individually configure voltages for each core of a multicore processor SoC, using a Processor Control Unit (PCU) and an integrated voltage regulator, allowing for programmable voltage settings beyond manufacturing fused values, thereby enabling per-core voltage adjustments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional speed binning treats multicore processors as single-core devices with a single voltage for the whole processor, then manufacturing variation management is simplified, but voltage configuration efficiency deteriorates and reliability degradation accelerates
Solution Approach 1:
The patent segments the voltage control for each processor core individually rather than applying a single voltage to the entire multicore processor. Each core can have its own voltage configuration, allowing optimized voltage settings that match each core's actual performance capabilities rather than being constrained by the slowest core's requirements.
Solution Approach 2:
The patent implements local quality by allowing different voltage levels for different cores based on their individual characteristics. Each core receives a voltage level appropriate to its specific performance capabilities, rather than applying a uniform voltage level across all cores, thereby optimizing reliability and performance for each core locally.
2Ease of operation
If a single minimum operating voltage is assigned to the whole processor based on the slowest core, then device classification is simplified, but heat generation increases and cooling requirements become more aggressive
Solution Approach 1:
The patent segments the voltage assignment process, allowing each core to be classified and assigned its own operating voltage independently. This eliminates the need to assign a single conservative voltage to the entire processor based on the slowest core, thereby reducing overall power consumption and heat generation.
Solution Approach 2:
The patent changes the voltage parameter individually for each core based on its specific characteristics rather than applying a uniform voltage parameter to all cores. This allows faster cores to operate at lower voltages, reducing power consumption and heat generation while maintaining appropriate operating conditions for each core.
3Reliability
If conservative guard bands are employed during testing with a single voltage for the whole processor, then quality management is simplified, but performance optimization is limited
Solution Approach 1:
The patent segments the voltage optimization process to allow each core to be tuned independently after manufacturing. This enables performance optimization for each core based on its actual capabilities rather than being constrained by conservative uniform voltage settings applied to the entire processor during testing and operation.
Solution Approach 2:
The patent introduces dynamic voltage configuration capabilities that allow voltage settings to be adjusted individually for each core based on actual performance characteristics. This dynamic approach enables better performance optimization compared to static conservative voltage settings applied uniformly across all cores.
Data Source
AI summary
Apparatuses, methods and storage medium for providing access from outside a multicore processor System on Chip (SoC) are disclosed herein. In embodiments, an SoC may include a memory to store a plurality of embedded values correspondingly associated with a plurality of architecturally identical cores. Each embedded value may indicate a default voltage for a respective one of the plurality of architecturally identical cores. In embodiments, an apparatus may include one or more processors, devices, and/or circuitry to provide access from outside the multicore processor SoC to individually configure voltages of the plurality of architecturally identical cores to values that are different than the values of the default voltages. Other embodiments may be described and/or claimed.