Per Device Addressability for Memory Subsystems

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Solution Overview

Problem

Traditional memory system training methods are prone to errors due to untrained data bus timings, leading to longer training times and performance degradation as the number of devices and configuration settings increase, especially at higher interface frequencies.

Innovation Solution

Implementing per device addressability (PDA) through the command and address (C/A) bus, allowing device selection and configuration without relying on the data bus, by assigning unique enumeration IDs and using these IDs to trigger PDA commands, thereby reducing the need for precise data bus timings and improving training efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional data bus training methods are used to program individual device configurations, then device configuration can be achieved, but errors are introduced due to untrained data bus timings

Engineering Contradiction:
Improveconfiguration accuracyVSAvoidtraining time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the configuration programming process into two distinct phases: (1) initial enumeration of device IDs using the command bus before data bus training, and (2) subsequent configuration programming using the trained data bus. This segmentation allows device identification to occur independently of data bus timing constraints, eliminating errors while maintaining efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs device ID enumeration as a preliminary action before data bus training is complete. By assigning unique identifiers to each device during the command bus training phase, the system prepares the necessary device selection information in advance, allowing fast-paced configuration programming to occur later without errors.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the amount of time spent training each device is extended to ensure proper signaling, then configuration reliability improves, but overall training time increases and degrades system performance

Engineering Contradiction:
Improvesignaling accuracyVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent divides the training and configuration process into separate phases with different reliability requirements. Command bus training for device enumeration uses relaxed timing, while data bus configuration occurs after rapid training. This segmentation achieves necessary signaling accuracy without extending overall training time, maintaining system performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the operational parameters of different buses at different stages. The command bus operates with relaxed timing parameters during enumeration, while the data bus is rapidly trained and then used for configuration. This parameter differentiation allows the system to achieve reliability where needed without sacrificing overall productivity.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If per device addressability is implemented through the data bus, then individual device configuration is enabled, but precise data bus timings are required which complicates the training process

Engineering Contradiction:
Improvedevice selection capabilityVSAvoidtraining complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments device selection functionality across two buses: the command bus handles device identification and selection through enumeration, while the data bus handles configuration programming. This segmentation eliminates the need for complex coordinated timing between device selection and data transfer, simplifying the overall training process while maintaining full per-device addressability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces device enumeration IDs as an intermediary mechanism. These IDs serve as mediators between the command bus and data bus, allowing device selection to be established through simple command bus operations before rapid data bus configuration occurs, without requiring complex timing coordination.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10997096B2Enumerated per device addressability for memory subsystems
Publication Date: 2021.05.04 ALTERA CORP
  • US10997096B2 patent drawing
  • US10997096B2 patent drawing
  • US10997096B2 patent drawing

AI summary

A memory subsystem enables per device addressability (PDA) to target configuration commands to one of multiple memory devices that share a select line or buffer devices that share an enable line. The system includes a host and multiple memory devices that can be coupled over a command bus and a data bus. The devices include a configuration or mode register to store a value to indicate whether PDA enumeration is enabled. When enabled, the host can provide an enumeration identifier (ID) command via the command bus with a signal via the data bus to assign an enumeration ID. After assignment of the enumeration ID, the host can send PDA commands via the command bus with the enumeration ID, without a signal on the data bus. Devices only process PDA commands that match their assigned enumeration ID, enabling the setting of device-specific configuration settings without needing to use the data bus on every PDA command.