Per-page Physical Address Space Distribution for Memory Modules

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Solution Overview

Problem

Current computing systems with unified address spaces face inefficiencies due to arbitrary distribution of computation and data across core clusters and memory modules, leading to excessive global on-chip traffic and performance/energy penalties, as they disregard physical proximity between core clusters and memory interfaces.

Innovation Solution

Implementing per-page control of physical address space distribution among memory modules using either fine-grain or coarse-grain distribution granularities, determined on a per-data-structure or per-application basis, to optimize data placement and reduce global traffic by exploiting physical proximity between core clusters and memory modules.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If arbitrary distribution of computation and data across core clusters and memory modules is performed, then unified address space is maintained, but global on-chip traffic increases and performance/energy penalties occur

Engineering Contradiction:

Improveunified address spaceVSAvoidenergy consumption

Core Design Contradiction:

Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent applies local quality by allowing different regions of the address space to be distributed to different memory modules based on their access patterns and proximity to core clusters. This enables localized optimization where frequently accessed data is placed in nearby memory modules, reducing global traffic while maintaining the overall unified address space through coordinated distribution policies across multiple memory controllers.

Inventive Principle:

Principle #3Local quality

2Adaptability or versatility

If arbitrary distribution of computation and data across core clusters and memory modules is performed, then unified address space is maintained, but global on-chip traffic increases

Engineering Contradiction:

Improveunified address spaceVSAvoidperformance

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

Inventive Principle:

Principle #3Local quality

3Loss of energy

If data is localized to nearby memory modules, then energy consumption and global traffic are reduced, but address space distribution complexity increases

Engineering Contradiction:

Improveenergy consumptionVSAvoidaddress space distribution complexity

Core Design Contradiction:

Loss of energyVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-determining the distribution of address space regions to memory modules based on their physical proximity to core clusters. This is achieved through configuration tables or metadata that map address ranges to specific memory modules, allowing the system to optimize data placement in advance without adding runtime complexity. The memory controllers are pre-configured with their responsible address regions, simplifying the actual access operations.

Inventive Principle:

Principle #10Preliminary action

4Manufacturing precision

If fine-grain distribution granularity is used, then data placement precision is improved, but control overhead increases

Engineering Contradiction:

Improvedata placement precisionVSAvoidcontrol overhead

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the address space into distinct regions that can be independently mapped to different memory modules. This segmentation allows fine-grain control over data placement at the region level without requiring bit-level precision. Each memory module is assigned specific address ranges, creating a manageable segmentation that balances placement precision with control simplicity through hierarchical address space organization.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS10282309B2Per-page control of physical address space distribution among memory modules

Publication Date: 2019.05.07 ADVANCED MICRO DEVICES INC

AI summary

Systems, apparatuses, and methods for implementing per-page control of physical address space distribution among memory modules are disclosed. A computing system includes a plurality of processing units coupled to a plurality of memory modules. A determination is made as to which physical address space distribution granularity to implement for physical memory pages allocated for a first data structure. The determination can be made on a per-data-structure basis (e.g., file, page, block, etc.) or on a per-application-basis. A physical address space distribution granularity is encoded as a property of each physical memory page allocated for the first data structure, and physical memory pages of the first data structure distributed across the plurality of memory modules based on a selected physical address space distribution granularity. Page table entries (PTEs) may be annotated with the selected physical address space distribution granularity, using an addressing mapping granularity (AMG) field of a page table entry, where the granularity may be, for example, a fine-grain distribution granularity or a coarse-grain distribution granularity.