Per-Pin PMU Calibration Across Ranges Without DUT Pin Loading
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Solution Overview
Problem
Existing test systems for electronic devices face challenges in providing driver, comparator, and active load functions that occupy minimal die area, minimize loading effects, and maximize functional test range while being cost-effective and high-fidelity, with issues in switch size, resistance, and calibration range.
Innovation Solution
A force-sense system with integrated switches and partitioned circuitry using different semiconductor substrates and processes, including CMOS and bipolar technologies, allows for selective control and calibration, minimizing loading and enhancing signal test range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If external switches are used to access DUT pins for calibration, then user calibration capability is provided, but switch size and resistance increase causing loading effects on the DUT pin
Solution Approach 1:
The patent extracts the switching function from external components and integrates it directly into the force-sense system circuitry. The switches are now part of the integrated device structure, eliminating the need for external switches that cause loading effects on DUT pins during calibration operations.
Solution Approach 2:
The patent merges the calibration access function with the existing force-sense system by integrating switches directly into the circuit. This combination allows calibration operations to be performed without introducing external components that would load the DUT pin, as the switches are now part of the same integrated structure.
2Area of stationary object
If integrated device structures are used to minimize die area, then device size is reduced, but functional test range may be limited
Solution Approach 1:
The patent implements multi-functionality within the integrated device structure by incorporating both force and sense operations, multiple operating modes (FVMI, FIMV, FIMI, FVMV, FNMV), and calibration capabilities into a single compact unit. This allows the small integrated device to perform multiple test functions that would traditionally require separate external components, thereby expanding the functional test range without increasing die area.
Solution Approach 2:
The patent employs dynamic configuration within the integrated structure through programmable control that allows the same hardware to adapt to different test modes and measurement ranges. The integrated switches and circuitry can be dynamically reconfigured to provide different force and sense ranges, enabling a compact device to achieve versatile functional test capabilities.
3Adaptability or versatility
If traditional test systems are used, then comprehensive testing capability is provided, but power consumption is high and cost is increased
Solution Approach 1:
The patent combines driver, comparator, active load, and per-pin parametric measurement functions into a single integrated device structure. This consolidation eliminates the need for multiple separate external components, reducing overall power consumption while maintaining comprehensive testing capability. The integrated architecture allows these functions to share common resources and operate more efficiently than traditional distributed systems.
Data Source
AI summary
A test equipment system can provide signals to, or receive signals from, a device under test (DUT). The test system can include an output stage with output buffer circuitry that can be locally or externally controlled. An external controller can be used to provide precision input signals and, in response, measure current at a DUT interface node of the system, or measure voltage characteristics of various components inside the system. Using the input signals from the external controller, one or more aspects of the test system can be calibrated. For example, resistances of sense resistors in the output stage can be calibrated using current signals received from the external controller. In another example, buffer offset characteristics can be determined using signals from the external controller to control local drive circuitry of the system.


