Per-Thread Memory Access Permissions via Protection Keys

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Solution Overview

Problem

Common memory protection mechanisms lack thread-level granularity in defining memory access permissions, which can lead to inadequate control over memory access operations in virtualized systems.

Innovation Solution

Implementing per-thread granular memory access permissions using a combination of per-thread memory protection keys and system call filters, where reserved bits in page table entries store memory protection keys that index thread-local protection key rights registers, and system call filters prevent threads from modifying these keys.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If common memory protection mechanisms are used, then system simplicity is maintained, but thread-level granularity in defining memory access permissions is lost

Engineering Contradiction:
Improvethread-level granularityVSAvoidmemory protection mechanism
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments memory protection by introducing per-thread protection keys (PKs) that are stored in page table entries. Each thread can have its own set of protection keys, allowing fine-grained control at the thread level rather than process level. This segmentation enables different threads to access different memory regions with different permissions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent adds a new dimension to memory protection by introducing protection keys as an additional layer between the traditional page table and memory access control. This PK dimension allows the system to track and control memory access permissions per-thread, transforming the protection model from flat process-level to multi-dimensional thread-level control.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If per-thread protection keys are implemented, then fine-grained memory access control is achieved, but the complexity of memory management structures increases

Engineering Contradiction:
Improvememory access controlVSAvoidmemory management structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the protection key storage directly into the existing page table entries by utilizing reserved bits in the page table. This integration avoids creating separate complex data structures for protection keys and instead combines them with the existing page table infrastructure, reducing overall system complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The page table entries are given multi-functionality by using their reserved bits to store protection key information in addition to their traditional memory mapping functions. This universal approach allows the same data structure to serve both memory management and access control purposes, eliminating the need for separate specialized structures.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If threads can modify protection keys freely, then thread flexibility is maintained, but security and integrity of memory protection is compromised

Engineering Contradiction:
Improvethread flexibilityVSAvoidmemory protection integrity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies preliminary anti-action by installing system call filters at thread initialization time that proactively prevent threads from modifying protection keys. These filters block system calls that would attempt to change PKs, ensuring that threads cannot compromise memory protection integrity before such attempts can occur.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The protection keys are pre-configured and locked down at thread initialization time, establishing secure boundaries before the thread begins execution. This preliminary setup ensures that threads operate within predefined memory access permissions throughout their lifetime, maintaining security without requiring continuous verification.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10496555B2Implementing per-thread memory access permissions
Publication Date: 2019.12.03 RED HAT INC
  • US10496555B2 patent drawing
  • US10496555B2 patent drawing
  • US10496555B2 patent drawing

AI summary

Disclosed are systems and methods of implementing per-thread granular memory access permissions. An example method may include: initializing a plurality of memory protection keys associated with a plurality of page table entries associated with an address space of a processing thread; loading, to a protection key rights register associated with the processing thread, a plurality of memory access permissions referenced by the memory protection keys; initializing a system call filter to prevent the processing thread from modifying the protection key rights register; and causing the processing thread to be executed.