Cross-Clock Domain Performance Counter Validation Circuit

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Solution Overview

Problem

Current performance monitoring systems in computer systems are limited as each performance counter can only collect data from a preselected portion of the performance monitor bus and are restricted to a specific clock domain, hindering simultaneous access and data validation across different clock domains.

Innovation Solution

A system is developed where a performance counter in a second clock domain performs computations relative to data from a first clock domain, utilizing validation circuitry to provide a validation signal for data validity, enabling access to any bit of the data bus and handling invalid or duplicate cycles across different clock frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If each performance counter is restricted to collecting data from only one preselected portion of the PMB, then the device complexity is reduced, but the adaptability and versatility of the performance monitoring system deteriorates

Engineering Contradiction:
Improveperformance counter configurationVSAvoiddata access flexibility
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The performance counter is designed with a multiplexer that allows it to selectively access any portion of the performance monitor bus, transforming it from a specialized single-function device into a universal multi-function device that can monitor any bus segment as needed

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If performance counters are restricted to a specific clock domain, then the reliability of data collection is improved, but the adaptability to handle intermixed data from different clock domains deteriorates

Engineering Contradiction:
Improvedata collection accuracyVSAvoidcross-clock domain capability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

A validation circuit acts as an intermediary between the performance monitor bus and the performance counter, filtering and validating data from different clock domains before presentation to the counter, thereby enabling cross-clock domain operation while maintaining data reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If performance counters cannot access data from different clock domains, then the measurement precision is maintained, but the productivity and comprehensive monitoring capability deteriorates

Engineering Contradiction:
Improveperformance data accuracyVSAvoidcomprehensive data collection efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The validation circuit performs preliminary validation of data from different clock domains before the performance counter processes it, ensuring that only valid data is counted, thus maintaining measurement precision while enabling comprehensive monitoring across multiple clock domains

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7624319B2Performance monitoring system
Publication Date: 2009.11.24 HEWLETT PACKARD ENTERPRISE DEV LP
  • US7624319B2 patent drawing
  • US7624319B2 patent drawing
  • US7624319B2 patent drawing

AI summary

A system for validating data collected in a first clock domain. A performance counter is disposed in a second clock domain to perform performance computations relative to the data. Validation circuitry is in communication with the data in order to provide to the performance counter a validation signal indicative of the validity of the data.