Performance Verification Testbench for Accurate System Design
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Solution Overview
Problem
Existing system design methods rely on educated guesses for performance metrics, which may not accurately reflect the actual performance of a system under design, leading to potential failures in meeting system requirements.
Innovation Solution
A method using a processor to generate a performance verification testbench from a hardware description language (HDL) design and an automaton, employing formal verification methods to determine provably accurate parameters, which are then used to execute and validate a performance model of the system under design against established system requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If performance models are developed from high-level specification with educated guesses, then the system design process is simplified and faster, but the accuracy of performance metrics deteriorates
Solution Approach 1:
The patent applies preliminary action by performing formal verification of performance metrics during the early system design phase, before implementation. The performance model is constructed and verified in advance using HDL code and formal methods, ensuring accurate metrics are established before the system is built, thus avoiding later redesign and ensuring precision without proportionally increasing overall complexity
Solution Approach 2:
The patent uses copying by creating a formal performance model that replicates the behavior of the actual system under design. This model is constructed from HDL code and serves as a verified copy that can be analyzed for performance metrics without building the physical system, thereby achieving high accuracy while managing design complexity through abstraction
2Measurement precision
If formal verification methods are used to determine parameters, then the accuracy of performance parameters is improved, but the time and computational resources required increase
Solution Approach 1:
The patent extracts only the essential performance parameters that need verification from the complete system design. Rather than verifying all system properties, the formal verification focuses specifically on extracting and validating the critical performance metrics from the HDL code, reducing the overall verification time while maintaining high accuracy for the most important parameters
Solution Approach 2:
The patent applies parameter changes by transforming the performance verification problem into a formal logic representation that can be efficiently processed. The performance model parameters are converted into formal verification constraints, allowing automated tools to determine accurate values through logical deduction rather than exhaustive simulation, thus reducing verification time while maintaining precision
Data Source
AI summary
System design using accurate performance models may include generating, using a processor, a performance verification testbench from a hardware description language design and an automaton and determining, using the processor, a parameter of the design by analyzing the performance verification testbench using formal verification methods. The parameter is provably accurate. A performance model of a system under design including the design may be executed. The performance model uses the parameter. A determination may be made, using the processor, whether the system under design meets a system requirement according to a comparison of a result of executing the performance model with the system requirement.