Peripheral Command Queue for Concurrent Interface Control
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Solution Overview
Problem
In peripheral interface controllers with high data bandwidth, providing control inputs from an external processor is challenging due to interface saturation during data transfers, leading to idle times and increased costs with integrated processors.
Innovation Solution
A peripheral component with a command queue that stores commands for data transfers, allowing control communications to occur concurrently with data transfers, reducing contention and optimizing interface utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the same internal interface is used for both data transfers and control communications, then device complexity is reduced, but control inputs are locked out during data transfers causing the external peripheral interface to idle
Solution Approach 1:
The interface operations are segmented into data transfer operations and control communication operations. The command queue separates control command processing from data transfer execution, allowing commands to be queued and processed independently without blocking the data transfer path. This segmentation resolves the contradiction by enabling both functions to operate concurrently through different operational pathways.
Solution Approach 2:
Control commands are loaded into the command queue in advance, before data transfers occur. The external processor can queue multiple control commands ahead of time, and these pre-loaded commands are then executed by the peripheral component during data transfer operations. This preliminary action eliminates the need to pause data transfers for control input, resolving the interface utilization problem.
2Productivity
If a processor is integrated into the peripheral interface controller to reduce contention, then control operations can proceed independently, but cost, space, and power consumption increase
Solution Approach 1:
The command queue acts as an intermediary structure between the external processor and the peripheral component. Instead of integrating a full processor into the peripheral controller, the command queue serves as a buffer that decouples command issuance from command execution. The peripheral component's control circuit reads and executes commands from this queue, achieving independent operation without requiring an integrated processor, thus resolving the contradiction between productivity and device complexity.
Solution Approach 2:
Rather than implementing a complete processor architecture in the peripheral controller, the system uses a simplified control circuit that copies the essential command execution functionality. The command queue stores standardized command formats that the control circuit can interpret and execute, providing processor-like independence with minimal hardware overhead. This copying approach achieves high interface efficiency without the full cost and complexity of an integrated processor.
3Productivity
If commands are provided during data transfers, then interface utilization improves, but contention between data transfers and control transfers increases
Solution Approach 1:
The system adds a temporal dimension to command delivery by using the command queue. Instead of attempting to deliver commands and data transfers simultaneously on the same interface timeline (which causes contention), commands are delivered in advance and stored in the queue. The peripheral component then executes these queued commands during data transfer operations, effectively operating in a different temporal dimension. This resolves the contradiction by eliminating temporal overlap and contention while maintaining high interface utilization.
Data Source
AI summary
In an embodiment, a peripheral component configured to control an external interface of an integrated circuit. For example, the peripheral component may be a memory interface unit such as a flash memory interface unit. The internal interface to the peripheral component may be shared between data transfers to/from the external interface and control communications to the peripheral component. The peripheral component may include a command queue configured to store a set of commands to perform a transfer on the interface. A control circuit may be coupled to the command queue and may read the commands and communicate with an interface controller to cause a transfer on the interface responsive to the commands. In an embodiment, a macro memory may store command sequences to be performed in response to a macro command in the command queue. In an embodiment, an operand queue may store operand data for use by the commands.