Conductive Vias in Peripheral Region for Shielding Grounding

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Solution Overview

Problem

Semiconductor devices face challenges in effectively shielding against electromagnetic interference (EMI) and radio frequency interference (RFI) due to the generation of undesired inter-device interference, which can interfere with the operation of adjacent circuit elements, and existing methods require additional manufacturing steps and costs for grounding connections.

Innovation Solution

A semiconductor device design that incorporates a ground plane within the substrate, with a shielding layer electrically connected to the ground plane through conductive vias formed in the peripheral region around the semiconductor die, allowing for effective isolation from EMI and RFI without the need for additional manufacturing steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If a shielding layer is disposed over the device and connected to ground using a grounding wire or external connection, then the device is isolated from EMI and RFI, but additional production steps are required and manufacturing costs increase

Engineering Contradiction:
ImproveEMI and RFI isolationVSAvoidmanufacturing process complexity
Core Design Contradiction:
Object-affected harmful factorsVSEase of manufacture

Solution Approach 1:

The patent merges the shielding layer directly with the ground plane by forming the shielding layer as an extension of the ground plane through the encapsulant, eliminating the need for separate grounding wires or external connections. This integration combines multiple functions (shielding and grounding) into a single unified structure, thereby isolating the device from EMI and RFI without adding manufacturing steps or costs.

Inventive Principle:
Principle #5Merging (Combining)

2Object-affected harmful factors

If a continuous channel is formed through the encapsulant to the ground plane, then complete shielding connection is achieved, but manufacturing complexity and cost increase

Engineering Contradiction:
ImproveEMI and RFI isolationVSAvoidchannel structure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent segments the channel structure into discrete sections rather than forming a single continuous channel through the entire encapsulant. These discrete conductive sections are positioned at strategic locations to provide effective grounding paths to the ground plane, achieving complete shielding connection while simplifying the manufacturing process and reducing structural complexity.

Inventive Principle:
Principle #1Segmentation

3Object-affected harmful factors

If additional grounding connections are added to the substrate, then EMI shielding effectiveness is improved, but production costs increase

Engineering Contradiction:
ImproveEMI shielding effectivenessVSAvoidmanufacturing materials and steps
Core Design Contradiction:
Object-affected harmful factorsVSQuantity of substance

Solution Approach 1:

The patent makes the ground plane multi-functional by having it extend through the encapsulant to serve both as the ground reference plane and as the grounding connection path for the shielding layer. This universal design allows the same ground plane structure to fulfill multiple functions (electrical grounding and EMI shielding connection), improving shielding effectiveness without requiring additional materials or production steps.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively isolates semiconductor devices from EMI and RFI, improving circuit performance by reducing cross-talk and eliminating the need for extra manufacturing steps, thereby lowering production costs and enhancing the reliability of high-frequency applications.

Implementation Method 1

A semiconductor device having conductive vias in peripheral region connecting shielding layer to ground

Methodology Applied
Scientific EffectElectrical Conduction: Conduction (electrical)

Implementation Method 2

shielding layer electrically connected to the ground plane through conductive vias formed in the peripheral region around the semiconductor die, allowing for effective isolation from EMI and RFI

Methodology Applied
Scientific EffectElectromagnetic Shielding: Faraday Cage

Data Source

PatentUS8598690B2Semiconductor device having conductive vias in peripheral region connecting shielding layer to ground
Publication Date: 2013.12.03 STATS CHIPPAC LTD
  • US8598690B2 patent drawing
  • US8598690B2 patent drawing
  • US8598690B2 patent drawing

AI summary

A semiconductor device is made by mounting a plurality of semiconductor die to a substrate, depositing an encapsulant over the substrate and semiconductor die, forming a shielding layer over the semiconductor die, creating a channel in a peripheral region around the semiconductor die through the shielding layer, encapsulant and substrate at least to a ground plane within the substrate, depositing a conductive material in the channel, and removing a portion of the conductive material in the channel to create conductive vias in the channel which provide electrical connection between the shielding layer and ground plane. An interconnect structure is formed on the substrate and are electrically connected to the ground plane. Solder bumps are formed on a backside of the substrate opposite the semiconductor die. The shielding layer is connected to a ground point through the conductive via, ground plane, interconnect structure, and solder bumps of the substrate.