Peripheral ESD Circuit with Oxide TFTs for Flexible Displays
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Solution Overview
Problem
Display apparatuses face challenges in effectively managing electrostatic electricity, which can lead to performance issues and damage, particularly in flexible and large-sized displays.
Innovation Solution
A display apparatus with a simple stack structure incorporating a substrate, data and voltage lines, and capacitors connected to thin-film transistors, where the capacitors allow current flow during static electricity events, using oxide semiconductor materials and conductive patterns to manage electrostatic discharge.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional ESD circuit is used in flexible displays, then electrostatic discharge protection is provided, but the device complexity and manufacturing difficulty increase due to the need for rigid structures and complex capacitor configurations
Solution Approach 1:
The patent changes the material parameter from conventional semiconductor to oxide semiconductor, which enables the circuit to function on flexible substrates while maintaining ESD protection capabilities. This material parameter change allows the circuit to be fabricated on flexible displays without requiring rigid structures
Solution Approach 2:
The patent merges the ESD protection function with the existing display circuit by integrating the ESD circuit into the non-display area and sharing voltage lines and signal lines with the display circuit. This reduces the overall device complexity by eliminating separate ESD protection structures
2Reliability
If ESD protection circuits are added to flexible displays, then electrostatic damage is prevented, but the ease of manufacture decreases due to additional fabrication steps and material requirements
Solution Approach 1:
The oxide semiconductor layer serves multiple functions: it acts as the semiconductor layer for the ESD protection transistor and can also function as a low-resistance layer or channel layer in display circuit transistors. This multi-functionality reduces the number of fabrication steps by using the same material layer for different purposes
Solution Approach 2:
The ESD circuit is designed to automatically activate when electrostatic discharge occurs, without requiring external control or additional fabrication steps for activation mechanisms. The circuit self-regulates by allowing current flow through the oxide semiconductor when voltage thresholds are exceeded
3Reliability
If complex capacitor structures are used for ESD protection, then electrostatic discharge is effectively managed, but the area occupied and device complexity increase
Solution Approach 1:
The patent extracts the essential ESD protection function from complex capacitor structures and implements it using a simpler configuration with the oxide semiconductor transistor and minimal capacitor elements. This extraction reduces the area occupied by the ESD circuit while maintaining protection effectiveness
Solution Approach 2:
The patent positions the ESD circuit in the non-display area, utilizing the vertical stacking and lateral arrangement in the non-display region. This dimensional arrangement allows the ESD circuit to occupy unused space without interfering with the display area, effectively reducing the impact on overall device area
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents electrostatic discharge, ensuring reliable operation and reducing potential damage in flexible and large-sized displays.
Implementation Method 1
the first capacitor and the second capacitor may be configured to allow current to flow through the channel area, when alternating static electricity occurs in the data line
Data Source
AI summary
A display apparatus includes a substrate including a data line extending in a first direction, a voltage line extending in the first direction, and a first circuit disposed in a non-display area and electrically connected to the data line and the voltage line, wherein the first circuit includes a thin-film transistor including a semiconductor layer and a gate electrode overlapping a semiconductor layer, where one side of the semiconductor layer is electrically connected to the data line and another side is electrically connected to the voltage line, a first capacitor including a first lower electrode not overlapping the semiconductor layer and a first upper electrode on the first lower electrode, and a second capacitor including a second lower electrode not overlapping the semiconductor layer and a second upper electrode on the second lower electrode, and the gate electrode is at a same layer as the data line and the voltage line.