Peripheral Interconnect Tree Topology for SoC Slave Endpoint Configuration

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Solution Overview

Problem

Existing system-on-chip (SoC) designs face challenges in configuring slave endpoint circuits efficiently, particularly in achieving a distributed, low-overhead, high-performance, and independent interconnect for managing memory-mapped transaction requests across a configurable network.

Innovation Solution

A peripheral interconnect with a tree topology is implemented, featuring a root node and switches that connect slave endpoint circuits, enabling memory-mapped transaction requests and providing a configuration mechanism independent of the programmable logic region's delivery mechanism, allowing for efficient communication and programming of slave endpoint circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a traditional SoC design is used, then integration of components increases speed and decreases size, but configuring slave endpoint circuits becomes complex and time-consuming

Engineering Contradiction:
Improveconfiguration speedVSAvoidinterconnect complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The interconnect is segmented into a peripheral interconnect for slave endpoint circuits and a configuration interconnect for programmable logic regions. This segmentation allows independent configuration of slave endpoints through the peripheral interconnect using memory-mapped transactions, while the configuration interconnect handles programmable logic configuration separately, reducing overall configuration complexity and time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The peripheral interconnect acts as an intermediary mechanism between the processing system and slave endpoint circuits. It uses memory-mapped transaction requests as intermediaries to configure slave endpoints efficiently, eliminating the need for complex direct configuration protocols and reducing configuration overhead.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of time

If a centralized configuration approach is used, then control is simplified, but configuration time and overhead increase

Engineering Contradiction:
Improveconfiguration timeVSAvoidconfiguration control
Core Design Contradiction:
Loss of timeVSEase of operation

Solution Approach 1:

Slave endpoint circuits are configured in advance through the peripheral interconnect using memory-mapped transactions before the main system operation begins. This preliminary configuration allows the slave endpoints to be ready for immediate use, reducing configuration time during system operation and eliminating the need for complex runtime configuration control.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If the configuration interconnect is shared with the peripheral interconnect, then device resources are reduced, but configuration performance and independence deteriorate

Engineering Contradiction:
Improveconfiguration independenceVSAvoidinterconnect structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The interconnect structure is segmented into two independent parts: the peripheral interconnect for slave endpoint configuration and the configuration interconnect for programmable logic region configuration. This segmentation ensures that configuration operations for different components do not interfere with each other, maintaining configuration independence and reliability while allowing each interconnect to be optimized for its specific function.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10621129B2Peripheral interconnect for configurable slave endpoint circuits
Publication Date: 2020.04.14 XILINX INC
  • US10621129B2 patent drawing
  • US10621129B2 patent drawing
  • US10621129B2 patent drawing

AI summary

A peripheral interconnect for configuring slave endpoint circuits, such as may be in a configurable network, in a system-on-chip (SoC) is described herein. In an example, an apparatus includes a processing system on a chip, a circuit block on the chip, and a configurable network on the chip. The processing system and the circuit block are connected to the configurable network. The configurable network includes a peripheral interconnect. The peripheral interconnect includes a root node and a plurality of switches. The root node and the plurality of switches are connected in a tree topology. First branches of the tree topology are connected to respective slave endpoint circuits of the configurable network. The slave endpoint circuits of the configurable network are programmable to configure the configurable network.