Peripheral Register Management Blocks for Microcontroller Load Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing number of functions in peripheral devices, such as display controllers and image correction chips, leads to a higher processing load on microcontrollers due to frequent register refreshing, which can result in register damage and increased software processing time, affecting overall system efficiency.
Innovation Solution
A semiconductor device with management blocks that aggregate values from multiple registers into a single aggregation value, reducing the burden on microcontrollers by minimizing the number of accesses required during refreshing and error detection, using cyclic redundancy check (CRC) for error detection and allowing for split regions with varying refresh frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all registers are refreshed periodically to prevent malfunctions, then reliability is improved, but processing load on the microcontroller increases
Solution Approach 1:
The register group is divided into multiple management blocks, each independently managed. This segmentation allows the microcontroller to refresh only specific blocks that need updating rather than all registers, reducing overall processing load while maintaining reliability of critical registers.
Solution Approach 2:
Each management block includes an autonomous refresh counter that automatically decrements and triggers refresh operations when the counter reaches zero. This self-service mechanism eliminates the need for the microcontroller to continuously manage refresh timing for all registers, significantly reducing processing load.
2Reliability
If refresh processing is performed frequently to ensure register integrity, then reliability is improved, but software processing time increases
Solution Approach 1:
The refresh counter is pre-loaded with a refresh period value before the refresh operation begins. This preliminary action allows the system to plan refresh timing in advance, enabling the microcontroller to perform other tasks during the countdown period rather than being blocked by continuous refresh monitoring.
Solution Approach 2:
Refresh operations are performed periodically based on the countdown timer rather than continuously. This periodic action reduces software processing time by allowing the microcontroller to focus on other tasks between refresh cycles, while still maintaining register integrity through regular updates.
3Adaptability or versatility
If the number of peripheral devices is increased to enhance functionality, then adaptability is improved, but the number of register accesses increases
Solution Approach 1:
Multiple peripheral device registers are grouped into management blocks that are managed collectively. This merging reduces the complexity of individual register access by organizing them into structured groups, making it easier to manage increased numbers of peripheral devices while maintaining adaptability.
Solution Approach 2:
The management block structure provides a universal framework that can accommodate multiple types of peripheral devices. This multi-functional design allows the same refresh and management mechanism to handle diverse peripheral devices, enhancing system adaptability without proportionally increasing access complexity.
Data Source
AI summary
A semiconductor device of a peripheral device control system includes one or more management blocks that are provided in association with a device to be controlled. The management blocks each include a plurality of registers that store information pertaining to each operation of the device to be controlled, and a first generation unit that performs a predetermined aggregation process on values of the plurality of registers included in the management block to generate an aggregation value that is a value formed by aggregating the values of the plurality of registers.