Peripheral Function Remapping for Pin-Limited IC Connections
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Solution Overview
Problem
Integrated circuit devices often have more peripheral functions than available external input-output connections, limiting their flexibility and functionality due to hardwired connections, which restrict the activation of features based on the number of pins or connections.
Innovation Solution
Implementing fully remappable peripheral functions with mapping registers that allow dynamic reconfiguration of input and output connections, enabling users to tailor the device's features to specific applications by mapping multiple peripheral functions to a single external connection, with optional lockable registers and error correction for robustness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If peripheral functions are hardwired to external connections, then device manufacturing is simplified, but device flexibility and adaptability are reduced
Solution Approach 1:
The patent implements dynamic remapping capability that allows peripheral functions to be reassigned to different external connections at runtime through software configuration. This transforms the static hardwired connection model into a dynamic reconfigurable system, enabling the same physical device to adapt to different application requirements without requiring physical reconfiguration or multiple device variants.
Solution Approach 2:
The patent creates a universal mapping mechanism where any peripheral function can be mapped to any external connection through a centralized mapping register. This multi-functional approach allows a single device to serve multiple application scenarios by dynamically assigning different peripheral functions to different connections based on system requirements, eliminating the need for application-specific hardwired designs.
2Adaptability or versatility
If more peripheral functions are included in the device, then device functionality is improved, but the limitation of external connections becomes more prominent
Solution Approach 1:
The patent introduces a centralized mapping register as an intermediary layer between peripheral functions and external connections. This mapping register acts as a configuration interface that simplifies the complex many-to-many relationship between peripherals and connections. Instead of managing complex point-to-point wiring or dealing with connection conflicts directly, the system uses the mapping register to abstract and manage the allocation, reducing the perceived complexity for users.
Solution Approach 2:
The patent changes the allocation parameter from fixed physical wiring to software-configurable mapping. By storing connection assignment information in programmable mapping registers, the system allows dynamic modification of the peripheral-to-connection allocation without physical changes. This parameter change from hardware-fixed to software-configurable enables flexible adaptation to different application scenarios while managing large numbers of peripherals.
3Reliability
If mapping registers are made lockable for security, then system robustness is improved, but ease of configuration is reduced
Solution Approach 1:
The patent implements a lock mechanism that allows the mapping registers to be locked after initial configuration. This preliminary action of locking prevents accidental or unauthorized changes to the peripheral-to-connection mapping during device operation. The system provides both configuration mode (when unlocking is permitted) and operational mode (when locking is enforced), ensuring that once the optimal configuration is established, it remains stable and protected against unintended modifications.
Data Source
AI summary
Peripheral functions of an integrated circuit device may be pooled and dynamically mapped to available external input-output connections of the integrated circuit device by using a set of configuration registers. To provide system robustness, the configuration registers may implement various levels of write protection, error correction and monitoring circuitry. One or more peripheral output functions may be mapped to one or more external output connections. Not more than one output function may be active at the same time on the same output connection. Outputs and inputs may be mapped to the same external input-output connection with or without the output being controllable for placement into an inactive state, e.g., high impedance or open collector. When the input is required to receive external data over the external input-output connection, the output may be placed into the inactive state.


