Peripheral Sleep Mode Buffering for Seamless Wake-Up

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Solution Overview

Problem

Existing battery-powered devices face inefficiencies in communication due to the need for host devices to wait for peripheral devices to wake up from sleep mode, leading to delays and increased complexity in power-saving handshaking, especially in protocols like SPI without built-in flow control.

Innovation Solution

A hardware mechanism that buffers incoming data and autonomously wakes up peripheral devices using the incoming clock, allowing seamless transition between sleep and awake states, reducing host software involvement and enabling dynamic power saving.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the peripheral device enters sleep mode to save power, then power consumption is reduced, but the host device experiences delays due to waiting for wake-up acknowledgement

Engineering Contradiction:
Improvepower consumptionVSAvoidcommunication delay
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The peripheral device performs preliminary actions by buffering incoming data in a FIFO buffer before the processor is fully awake. The hardware mechanism detects incoming traffic and triggers wake-up in advance, allowing data to be staged in the buffer during the transition period, so processing can resume seamlessly without host delays.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A hardware mechanism acts as an intermediary between the host device and the sleeping peripheral processor. This intermediary monitors the communication interface, detects incoming data, triggers wake-up events, and manages the FIFO buffer, shielding the host from the peripheral's power state transitions and eliminating wait states.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Use of energy by moving object

If proprietary out-of-band behavior is implemented for power-saving handshaking, then power saving functionality is achieved, but hardware and software complexity increases

Engineering Contradiction:
Improvepower savingVSAvoidhardware and software complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The peripheral device serves itself by implementing autonomous power management. The FIFO buffer and wake-up trigger mechanism operate automatically based on incoming data detection, eliminating the need for complex host-peripheral handshaking protocols. The device autonomously decides when to wake up and process data without external coordination overhead.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The power management functionality is extracted from the software layer and implemented as dedicated hardware logic. The wake-up trigger mechanism and FIFO buffer management are handled by hardware circuits rather than software protocols, removing the complexity of proprietary handshaking behavior from both host and peripheral software.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If the host waits for wake-up acknowledgement before sending data, then data integrity is ensured, but system throughput decreases

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidsystem throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary data buffering in the FIFO buffer before the processor is fully operational. Data integrity is maintained because the hardware mechanism ensures the processor wakes up before the buffer is emptied, while throughput improves because the host can continuously transmit data without waiting for processor readiness acknowledgements.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9459886B2Autonomous sleep mode
Publication Date: 2016.10.04 TEXAS INSTRUMENTS INC
  • US9459886B2 patent drawing
  • US9459886B2 patent drawing
  • US9459886B2 patent drawing

AI summary

A system and method is disclosed that enables a peripheral or slave device to seamlessly transition in and out of sleep state while remaining completely transparent to host software. When the device is in a sleep mode and incoming data is detected, the device begins a wake-up procedure and data is routed to a first, transitional memory. The size of the transitional memory is selected such that it is capable of buffering data received during time required for the system memory to stabilize from wake-up. Once a second, extended memory is stabilized, the data is buffered from the transitional memory to the extended memory. The device resumes normal operation when its processor has initialized and can read data from the extended memory.