Peripheral-Supplied Partial Addressing for DMA Controller Flexibility
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Solution Overview
Problem
Conventional DMA controllers lack flexibility in addressing modes, making them inadequate for complex peripherals that require non-linear data access or multi-channel operations, such as CAN buses and multi-word message handling.
Innovation Solution
The DMA controller allows peripherals to supply partial addresses, which are combined with bits from a source register to form destination addresses, enabling non-linear access to RAM and supporting complex addressing schemes through programmable and configurable multiplexers that select address bits from both peripherals and registers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional DMA controllers are used without complex addressing modes, then the DMA module remains simple and easy to implement, but it cannot support complex peripherals requiring non-linear data access or multi-channel operations
Solution Approach 1:
The address generation is segmented into two parts: a base address provided by the DMA controller and offset address bits provided by the peripheral. This segmentation allows the DMA to maintain simplicity while supporting complex addressing modes, as each component only handles a portion of the addressing task.
Solution Approach 2:
The DMA controller is designed with universal addressing capability that can work with multiple peripheral types (UART, CAN, SPI, I2C) by accepting variable numbers of offset address bits from different peripherals. This multi-functionality allows a single simple DMA structure to support diverse addressing requirements without requiring complex dedicated logic for each peripheral type.
2Adaptability or versatility
If the DMA controller allows peripherals to supply partial addresses, then non-linear access to RAM becomes possible, but the address formation mechanism becomes more complex
Solution Approach 1:
The address formation mechanism merges the base address from the DMA controller with offset address bits from the peripheral through a simple addition operation. This merging approach enables non-linear access capability while keeping the address formation mechanism relatively simple, as it combines two inputs through a standard arithmetic operation rather than requiring complex logic.
3Productivity
If simple DMA operations are used, then the system remains efficient and fast, but it cannot handle complex peripherals like CAN buses with multi-word messages
Solution Approach 1:
The DMA controller dynamically adapts to different peripheral requirements by accepting variable numbers of offset address bits (0-8 bits) from each peripheral. This dynamic configuration allows the same simple DMA structure to efficiently handle both simple peripherals and complex peripherals like CAN buses with multi-word messages, maintaining high productivity across different applications.
Data Source
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AI summary
A method of performing a direct memory access has the steps of selecting a peripheral device for performing a direct memory access through a direct memory access controller; providing a partial address by the peripheral device to the direct memory access controller; and forming the source or destination address by combining the partial address with selected bits from a source register within the direct memory access controller.