Integrated Permalloy Inductor Packaging for Smaller Chip Footprints

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Solution Overview

Problem

Conventional inductors occupy significant space, making it difficult to integrate them with downsized semiconductor chips, which is a challenge in modern semiconductor package devices.

Innovation Solution

A miniaturized on-chip inductor with a permalloy core and conductive coils is integrated using a chip on wafer on substrate (CoWoS) and pick-and-place processes, maintaining manufacturing efficiency and reducing the inductor's size while enhancing performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional inductor designs are used, then desirable inductor performance is achieved, but the inductor occupies a considerable amount of space making integration with downsized semiconductor chips difficult

Engineering Contradiction:
Improveinductor performanceVSAvoidinductor size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The inductor is integrated within the semiconductor package structure by nesting the inductor component within the package housing, allowing the inductor to be contained within the existing package footprint rather than requiring additional external space. This nesting approach enables downsized integration while maintaining inductor functionality.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The inductor is combined with other semiconductor package components into an integrated assembly, where the inductor shares the package housing and structural elements with other components. This merging of functions and structures reduces overall device size and enables better integration with downsized semiconductor chips.

Inventive Principle:
Principle #5Merging (Combining)

2Area of stationary object

If inductor size is reduced for integration, then space is saved, but manufacturing complexity increases

Engineering Contradiction:
Improveinductor sizeVSAvoidintegration complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The package housing serves multiple functions: it provides structural support for the semiconductor chip, encloses the inductor component, and acts as the overall device housing. This multi-functionality reduces the need for additional components and simplifies the integration process despite the reduced inductor size.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The inductor is designed as a separate modular component that can be independently manufactured and then integrated into the semiconductor package. This segmentation allows for specialized inductor fabrication using appropriate techniques while maintaining compatibility with standard semiconductor packaging processes, thereby managing manufacturing complexity.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed inductor achieves better performance with a smaller size, utilizing permalloy's high permeability coefficient, and is compatible with existing semiconductor fabrication processes.

Implementation Method 1

utilizing permalloy's high permeability coefficient

Methodology Applied
Scientific EffectHigh permeability coefficient: Ferromagnetism

Data Source

PatentUS12500157B2Semiconductor package device with integrated inductor and manufacturing method thereof
Publication Date: 2025.12.16 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12500157B2 patent drawing
  • US12500157B2 patent drawing
  • US12500157B2 patent drawing

AI summary

A method of manufacturing a semiconductor device is provided. A permalloy device is received. An interposer die is formed. A conductive coil is formed over a substrate, and the conductive coil includes a bottom metal layer over the substrate, a middle metal layer and a top metal layer interconnected to each other. The permalloy device is disposed in the middle metal layer through a pick and place operation before forming the top metal layer of the conductive coil. A semiconductor die is bonded to the interposer die. The permalloy device has a polygonal ring shape wrapped with the conductive coil.