Permutation Sequencer Using One-Hot Logic for Flexible Power-Up Order

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Solution Overview

Problem

Conventional sequencer designs are inflexible and difficult to modify when client units are added, removed, or swapped, as they are hard-coded, limiting the ability to change the power up sequence in response to changing system architectures.

Innovation Solution

A permutation sequencer with a one hot list, XOR logic, and an accumulation register, along with a power good register and logic module, allows for a generic and flexible architecture that enables arbitrary client unit enablement sequences using bit-level processing, maintaining state and allowing for easy modification of the power up sequence.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional hard-coded sequencer designs are used, then the sequencer can implement a fixed power up sequence, but the architecture becomes inflexible and difficult to modify when client units are added, removed, or swapped

Engineering Contradiction:

Improveflexibility to change power up sequenceVSAvoidhard-coded logic architecture

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The sequencer uses a dynamic array structure stored in memory to represent the power up sequence, rather than hard-coded logic. The array can be modified by writing new sequence values to memory locations, allowing the system to adapt to changing client unit configurations without hardware changes. The read pointer dynamically traverses this array to enable client units in the specified sequence.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The invention uses a memory-based representation (copy) of the power up sequence instead of physical hard-wired logic. The sequence is stored as data in memory that can be read and processed, allowing easy modification by simply changing the stored values rather than redesigning the logic circuitry.

Inventive Principle:

Principle #26Copying

2Reliability

If the sequencer maintains state for previously enabled client units, then the power up sequence can be properly managed, but the logic becomes more complex

Engineering Contradiction:

Improvestate maintenanceVSAvoidsequencer logic

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The invention introduces an accumulation register as an intermediary component that maintains the state of enabled client units. This register accumulates the enable status and provides a clean interface between the sequence control logic and the client units, simplifying the overall control logic while reliably maintaining state information.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The sequencer implements feedback by comparing the accumulation register contents with the current sequence state. This feedback mechanism ensures that previously enabled client units remain enabled and that the sequence progresses correctly, providing reliable state maintenance through a simple comparison operation.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS10320392B2Apparatus and method for a permutation sequencer

Publication Date: 2019.06.11 QUALCOMM INC

AI summary

Aspects of the disclosure are directed to sequencing. In accordance with one aspect, sequencing includes creating a one hot list; selecting a current word of the one hot list as a one hot list output; comparing the one hot list output with a current accumulation register value of an accumulation register to produce a logical comparison; inputting the logical comparison to the accumulation register to generate an updated accumulation register value; and outputting the updated accumulated register state to a client unit to enable or disable the client unit.