Register-Based Lookup Permute Instruction for Eight-Bit Indexing
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Solution Overview
Problem
Existing register-based lookup techniques require additional mask instructions and mask registers for eight-bit inputs, leading to increased computational overhead and reduced processing efficiency due to the need for double the registers and lookup instructions for every additional bit of input beyond seven bits.
Innovation Solution
The proposed solution utilizes all eight bits of a destination register index to access source registers without requiring additional mask instructions or mask registers, employing a multiplexer that uses bit seven as a selector to determine which result to overwrite the index with, thereby reducing the number of instructions needed for register-based lookups.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional register-based lookup techniques are used for eight-bit inputs, then lookup functionality is achieved, but additional mask instructions and mask registers are required, increasing computational overhead and reducing processing efficiency
Solution Approach 1:
The patent extracts the masking functionality from separate mask instructions and mask registers and integrates it directly into the permute instruction itself. The permute instruction now inherently handles the selection of source registers and byte lanes without requiring external mask operations, thereby eliminating the computational overhead associated with separate masking steps.
Solution Approach 2:
The patent merges the permutation operation and the masking operation into a single unified permute instruction. By combining these previously separate operations, the instruction can simultaneously perform data selection and permutation in one execution cycle, reducing the total number of instructions and improving processing efficiency.
2Adaptability or versatility
If double the registers and lookup instructions are used for every additional bit of input beyond seven bits, then eight-bit input capability is achieved, but the number of registers and instructions increases, reducing processing efficiency
Solution Approach 1:
The patent designs the permute instruction to be universally applicable across different input widths (up to eight bits) without requiring separate instruction sets or additional registers for each width. The single instruction handles variable input sizes by using its encoded parameters to directly specify source registers and byte lanes, making the hardware resource usage independent of the specific input width within the supported range.
Solution Approach 2:
The patent changes the parameters encoded within the permute instruction to directly represent source register indices and byte lane selections. By encoding these parameters differently from conventional approaches, the instruction can address eight-bit inputs using the same number of registers and instructions, effectively changing the parameter encoding scheme to eliminate the exponential growth in resource requirements.
3Ease of operation
If mask instructions and mask registers are used for register-based lookups, then selective data retrieval is achieved, but separate mask registers and instructions are required, increasing computational overhead
Solution Approach 1:
The permute instruction performs selective data retrieval autonomously using its own encoded parameters without requiring external mask instructions or mask registers. The instruction self-determines which source registers and byte lanes to access based on its encoding, eliminating the need for separate masking operations and reducing computational overhead while maintaining full selective retrieval capability.
Data Source
AI summary
Permute instructions for register-based lookups is described. In accordance with the described techniques, a processor is configured to perform a register-based lookup by retrieving a first result from a first lookup table based on a subset of bits included in an index of a destination register, retrieving a second result from a second lookup table based on the subset of bits included in the index of the destination register, selecting the first result or the second result based on a bit in the index of the destination register that is excluded from the subset of bits, and overwriting data included in the index of the destination register using a selected one of the first result or the second result.