Permute Network for Non-Sequential Vector Data Streaming
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Solution Overview
Problem
Digital signal processors face challenges in efficiently processing real-time data streams due to limitations in memory bandwidth and scheduling, particularly in applications requiring predictable non-sequential input patterns.
Innovation Solution
The implementation of a streaming engine within the DSP core that manages data streams by generating addresses, performing data formatting, and providing formatted data to the processor, enhancing memory bandwidth and reducing the processor's memory fetch tasks, thereby improving data scheduling and processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a traditional memory access approach is used to load data registers, then the processor can execute instructions, but memory bandwidth is limited and cache miss stalls increase
Solution Approach 1:
The streaming engine performs preliminary actions by pre-fetching and formatting data elements from memory into the data register file before the vector functional units need them. This includes generating addresses, permuting data elements into the required pattern, and making data ready in advance, thereby eliminating cache miss stalls and improving processing efficiency
2Adaptability or versatility
If data is fetched sequentially from memory, then memory access is simple, but non-sequential input patterns required by video encoding cannot be achieved
Solution Approach 1:
The streaming engine acts as an intermediary between memory and the vector functional units. It implements a permute network that can arbitrarily permute data elements from sequential memory locations into non-sequential patterns required by video encoding algorithms, thereby providing data pattern flexibility without complicating the memory access interface
Solution Approach 2:
The streaming engine is an autonomous unit that self-manages the complex task of generating addresses, permuting data elements, and formatting data without requiring intervention from the main processor or complex memory control logic. This keeps the memory access interface simple while achieving versatile data patterns
3Power
If the processor handles all memory fetch tasks, then control is centralized, but bandwidth to functional units is reduced and scalar operations increase
Solution Approach 1:
The system is segmented into distinct functional units: the streaming engine handles memory access, address generation, and data permutation tasks, while the vector functional units focus on data processing. This segmentation increases bandwidth to functional units by dedicating the streaming engine to data preparation and reduces processor complexity by offloading scalar operations
Data Source
AI summary
A method is provided that includes receiving, in a permute network, a plurality of data elements for a vector instruction from a streaming engine, and mapping, by the permute network, the plurality of data elements to vector locations for execution of the vector instruction by a vector functional unit in a vector data path of a processor.