Perpendicular eFuse Bit Cell Layout for Compact OTP Memory
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Solution Overview
Problem
Existing one-time-programmable (OTP) memory elements, such as electrical fuses (eFuses), in integrated circuits face challenges in achieving efficient programming and reading operations while maintaining a compact size and minimizing power consumption.
Innovation Solution
The design of an eFuse bit cell with a program device and an eFuse aligned perpendicular to each other, where the eFuse has a conductive path along one direction and is electrically connected to a conductive element, allowing for efficient programming and reading operations with reduced size and power consumption by optimizing the resistance values and electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a narrow stripe of conducting material is used for the eFuse link, then the programming current efficiency is improved, but the device size is reduced
Solution Approach 1:
The eFuse link is configured to extend in the channel width direction (second direction) rather than the channel length direction (first direction). This dimensional reorientation allows the conductive path to be perpendicular to the transistor channel, enabling compact integration while maintaining effective programming current flow through the link.
Solution Approach 2:
The conductive element is positioned to overlap with the first source/drain region and is electrically connected to both the source/drain region and the eFuse. This localized electrical connection optimizes the current path at the critical interface between the program device and eFuse, improving programming efficiency without requiring additional device area.
2Device complexity
If the eFuse and program device are aligned perpendicular to each other, then the device complexity is reduced, but the manufacturing precision requirements are increased
Solution Approach 1:
The perpendicular alignment of the eFuse link with the transistor channel (orienting the conductive path in the channel width direction rather than length direction) simplifies the overall device layout and reduces interconnect complexity. This dimensional arrangement naturally separates the programming path from the read path, making the device structure more manageable despite requiring precise alignment during fabrication.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables reliable programming and reading of eFuses with smaller device sizes and lower power consumption, enhancing the performance and efficiency of OTP memory elements in integrated circuits.
Implementation Method 1
an eFuse including a conduction path along the first direction, and a conductive element electrically connected with the first source/drain region and one end of the eFuse
Data Source
AI summary
A bit cell includes a program device comprising a first source/drain region and a second source/drain region separated by a first channel. The first source/drain region, the second source/drain region, and the first channel are positioned along a first direction. The bit cell also includes an electrical fuse (eFuse) having a conduction path along the first direction. A conductive element is electrically connected with the first source/drain region and one end of the eFuse.