Persistent Cache for NVM Write Amplification Reduction
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Solution Overview
Problem
Current data storage systems for non-volatile memory (NVM) devices are inefficient in managing rewrites and overwrites, leading to increased write amplification and reduced endurance, as they often write logical blocks into different physical addresses, which is not application-dependent and fails to optimize caching based on data access patterns.
Innovation Solution
Implementing an intelligent caching policy that maintains data objects in a persistent cache memory module for an optimized duration based on data access patterns and application data sets, preventing rewriting of logical blocks into different physical addresses and reducing garbage collection-related writes by scheduling movement actions and invalidating data blocks based on calculated timeout values and write amplification thresholds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If data is written into different physical addresses for each logical block, then data storage flexibility is improved, but write amplification increases and endurance deteriorates
Solution Approach 1:
The system performs preliminary actions by writing data to a persistent cache memory module before writing to NVM media. This intermediate step allows the system to detect and eliminate duplicate writes to the same logical block address, preventing unnecessary write amplification while maintaining storage flexibility. The cache acts as a buffer that enables preliminary verification of write operations.
Solution Approach 2:
The persistent cache memory module serves as an intermediary between the host system and NVM media. This intermediary layer tracks written logical block addresses and prevents duplicate writes to NVM, thereby reducing write amplification and improving endurance without sacrificing the ability to store data flexibly across different physical addresses.
2Ease of operation
If garbage collection is performed frequently to reclaim invalid pages, then storage space availability is improved, but the number of write operations increases and endurance worsens
Solution Approach 1:
The system performs preliminary deduplication in the persistent cache memory module before data is written to NVM media. By tracking logical block addresses and identifying duplicate writes in advance, the system prevents the creation of invalid pages that would otherwise require garbage collection, thereby reducing the frequency of GC operations and improving endurance.
Solution Approach 2:
The system converts the potential harm of duplicate writes (which create invalid pages requiring GC) into a benefit by using the persistent cache to detect and eliminate these duplicates. The cache's ability to track writes is transformed from a potential performance overhead into a mechanism that reduces overall write amplification and GC requirements.
3Reliability
If persistent cache memory is used to prevent duplicate writes, then write amplification is reduced, but device complexity increases
Solution Approach 1:
The persistent cache memory module performs self-service by automatically tracking written logical block addresses and identifying duplicate writes without requiring complex external control mechanisms. The cache inherently maintains the necessary information (LBA tracking) to prevent duplicate writes, simplifying the overall system architecture compared to alternative approaches that would require sophisticated software-based deduplication.
Data Source
AI summary
Systems and methods of managing data storage, on non-volatile memory (NVM) media, by at least one processor may include: receiving a first storage request, to store a first data block on the NVM media; storing content of the first data block on a cache memory module; scheduling a future movement action of the content of the first data block from the cache memory module to the NVM media; and moving, transmitting or copying the content of the first data block from the cache memory module to at least one NVM device of the NVM media, according to the scheduled movement action.