Persistent Hardware State Recovery for Zero-Time Restart

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Solution Overview

Problem

Existing hardware recovery processes often result in the loss of hardware state information during device failures or updates, leading to incomplete or outdated system recovery states.

Innovation Solution

A zero-time hardware recovery process utilizing a persistent memory that shares execution data and hardware state information between applications, allowing for rapid recovery through a primary application managing communication ports and a secondary application writing to and retrieving this information from the persistent memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If hardware state information is stored in volatile memory during application execution, then the system operates with fast access speed, but the information is lost upon device failure or update requiring recovery time

Engineering Contradiction:
Improveaccess speedVSAvoiddata persistence
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by continuously writing hardware state information to persistent storage (NVLink, NVSIM, or host memory) before failures occur. This pre-positioning of recovery data eliminates recovery time after crashes or updates, as the information is already prepared and accessible immediately when the application needs to resume.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces persistent storage media (NVLink, NVSIM, or host memory) as an intermediary between volatile application memory and permanent storage. This intermediary layer maintains hardware state information in a format accessible to both the running application and the recovery process, enabling seamless data persistence without sacrificing access speed.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If hardware state information is written to persistent storage continuously, then data persistence is ensured, but system performance and memory access speed deteriorate

Engineering Contradiction:
Improvedata persistenceVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements partial action by selectively writing only critical hardware state information to persistent storage, rather than continuously dumping all memory contents. The system writes essential recovery data (hardware state, execution context) at strategic points during application execution, maintaining persistence while minimizing performance impact.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent applies local quality by creating different memory regions with different persistence characteristics. Critical hardware state information is written to persistent storage areas (NVLink, NVSIM), while other data remains in fast volatile memory. This localized persistence approach ensures data survival without forcing all memory operations through slow persistent storage paths.

Inventive Principle:
Principle #3Local quality

3Reliability

If a traditional recovery process is used after device failure, then the system can resume operation, but hardware state information is lost or outdated requiring recovery time

Engineering Contradiction:
Improverecovery capabilityVSAvoidrecovery time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent uses preliminary action by pre-writing hardware state information to persistent storage before failures occur. When a crash or update happens, the application simply resumes reading from the already-prepared persistent data, achieving zero-time recovery. This eliminates the traditional recovery sequence of detecting failure, reconstructing state, and restoring operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates copies of hardware state information in persistent storage (NVLink, NVSIM, or host memory) that mirror the volatile memory contents. These copies serve as immediate recovery sources, allowing the application to restore state by simply reading the preserved copy rather than reconstructing it after failure.

Inventive Principle:
Principle #26Copying

4Productivity

If communication ports are shared between primary and secondary applications, then resource utilization improves, but process complexity increases

Engineering Contradiction:
Improveresource utilizationVSAvoidprocess complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing communication ports that serve multiple functions and multiple applications. The same port infrastructure handles both primary application execution and secondary application recovery operations, eliminating the need for separate dedicated channels. This multi-functional design improves resource utilization while the standardized interface keeps complexity manageable.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260072797A1Hardware recovery utilizing state information
Publication Date: 2026.03.12 MELLANOX TECHNOLOGIES LTD(IL)
  • US20260072797A1 patent drawing
  • US20260072797A1 patent drawing
  • US20260072797A1 patent drawing

AI summary

Embodiments of the present disclosure are directed to a zero-time hardware recovery process. The recovery process utilizes a persistent memory shared between applications and in which the applications write execution data and hardware state information. This memory can be a file, a network database, another network resource, etc. Generally speaking, a primary application creates and manages communication ports which are used as a communication channel to the hardware/firmware and which can be shared between the applications. The primary application also listens for process recovery attempts. A secondary application writes execution data and hardware state information to the persistent memory. Upon a recovery of the second process, the execution data and hardware state information is received from the shared persistent memory. The recovery can be performed in response to a crash or a version update.