Persistent Memory Barriers for Ordered Flush and Power-Loss Recovery

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Solution Overview

Problem

Existing data structures in volatile memory are prone to overwriting and loss due to their non-persistent nature, leading to data integrity issues and difficulty in maintaining operation order during power failures or restarts, with backups being resource-intensive and disruptive during high-use times.

Innovation Solution

Implementing a hardware controller that determines completion of barrier operations and preserves snapshot copies of data, along with a secondary power supply to ensure data is flushed to non-volatile storage during power disruptions, and using auto-commit memory to guarantee data persistence with memory semantic operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data structures are stored in volatile memory for fast access, then speed is improved, but reliability deteriorates due to data loss during power failures

Engineering Contradiction:
Improvedata access speedVSAvoiddata persistence
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The memory system is segmented into volatile memory regions for fast access and non-volatile memory regions for persistence. The patent divides the addressable memory space into multiple regions, with some regions backed by volatile memory and others by non-volatile memory, allowing applications to access data at high speed while ensuring persistence for critical data structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary actions by pre-allocating non-volatile memory regions and establishing persistence protocols before data loss can occur. Barrier operations are implemented to ensure that data is committed to non-volatile storage before subsequent operations proceed, preventing data loss during power failures.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If traditional backup methods are used to prevent data loss, then reliability is improved, but productivity deteriorates due to resource consumption and access disruption

Engineering Contradiction:
Improvedata protectionVSAvoiddata access efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges backup functionality into the core memory access operations. Instead of separate backup processes that disrupt access, the persistence mechanism is integrated into the memory management unit, allowing data to be automatically committed to non-volatile storage as part of normal memory operations without requiring separate backup interventions.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The memory system provides self-service persistence through automatic commit operations. The memory management unit autonomously handles data persistence by monitoring write operations and automatically flushing data to non-volatile storage when barrier operations are encountered, eliminating the need for external backup processes and maintaining continuous data protection without productivity loss.

Inventive Principle:
Principle #25Self-service

3Speed

If processor caches are used for volatile memory optimization, then speed is improved, but reliability deteriorates due to arbitrary destaging order

Engineering Contradiction:
Improvecache access speedVSAvoidoperation ordering
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent introduces barrier operations as intermediary synchronization points between cache operations and persistent storage. These barrier operations act as mediators that ensure proper ordering of memory operations, forcing the system to flush cache data to non-volatile storage in the correct sequence and preventing the reliability issues caused by arbitrary destaging order.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12517888B2Persistent memory management
Publication Date: 2026.01.06 SANDISK TECHNOLOGIES LLC
  • US12517888B2 patent drawing
  • US12517888B2 patent drawing
  • US12517888B2 patent drawing

AI summary

Apparatuses, systems, methods, and computer program products are disclosed for persistent memory management. Persistent memory management may include replicating a persistent data structure in volatile memory buffers of at least two non-volatile storage devices. Persistent memory management may include preserving a snapshot copy of data in association with completion of a barrier operation for the data. Persistent memory management may include determining which interface of a plurality of supported interfaces is to be used to flush data from a processor complex.