Persistent Memory System with DRAM Cache for PCM Life Extension
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current CPU systems face inefficiencies due to the need for frequent loading of executable instructions from nonvolatile to volatile memory, leading to increased power consumption and reduced memory operation speeds, especially when using phase change memory (PCM) as main memory, which also suffers from non-symmetrical read/write speeds and limited program-erase cycles.
Innovation Solution
Implementing a system with persistent memory, such as PCM, that allows sharing among multiple CPUs, incorporating cache coherence protocols and using a DRAM cache to manage write operations and reduce program-erase cycles, thereby enhancing memory operation speeds and extending PCM life.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If frequent loading of executable instructions from nonvolatile to volatile memory is performed, then data accessibility is improved, but power consumption increases and memory operation speed decreases
Solution Approach 1:
The patent implements a persistent memory system that pre-loads and caches executable instructions and data into a volatile memory buffer before they are needed by the CPU. This preliminary action reduces the frequency of loading operations from nonvolatile storage, thereby decreasing power consumption while maintaining data accessibility.
Solution Approach 2:
The patent introduces a persistent memory layer as an intermediary between nonvolatile storage and volatile memory. This persistent memory maintains data in a stable state and provides fast access to frequently used instructions, acting as a mediator that reduces the need for frequent transfers between nonvolatile and volatile memory, thus lowering power consumption.
2Reliability
If frequent loading of executable instructions from nonvolatile to volatile memory is performed, then data accessibility is improved, but memory operation speed decreases
Solution Approach 1:
The persistent memory system pre-loads executable instructions into a volatile memory buffer in advance, so that when the CPU needs these instructions, they are already available in fast memory. This preliminary action eliminates the speed penalty of frequent loading operations from slow nonvolatile storage.
Solution Approach 2:
The patent segments memory into multiple layers: persistent memory for stable storage, volatile memory buffer for fast access, and cache memory for immediate CPU access. This segmentation allows different types of data to be stored in the most appropriate memory layer, optimizing overall memory operation speed while maintaining data accessibility.
3Reliability
If phase change memory is used as main memory, then non-volatility is improved, but program-erase cycle life is limited
Solution Approach 1:
The patent introduces a volatile memory buffer as an intermediary layer between the persistent memory and the CPU. This buffer absorbs write operations, allowing the persistent memory to be updated less frequently. By mediating write operations, the system maintains non-volatility while reducing the program-erase cycle burden on the PCM.
Solution Approach 2:
The patent applies different memory technologies to different parts of the memory hierarchy based on their specific strengths: persistent memory is used for stable, non-volatile storage where data must be preserved, while volatile memory buffer is used for frequent write operations. This local quality assignment optimizes both non-volatility and program-erase cycle life by placing each memory type where it performs best.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption, increases memory operation speeds, and extends the life of PCM by caching write information and managing program-erase cycles, while maintaining non-volatile data even when power is removed.
Implementation Method 1
phase change memory (PCM) as main memory
Data Source
AI summary
Subject matter disclosed herein relates to a system of one or more processors that includes persistent memory.