Persistent Memory Reference Segmentation for Cross-Host Access

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Solution Overview

Problem

Existing solutions for persistent memory fail to establish address translations to persistent memory devices across reboots and between multiple hosts, as they often rely on local references or assume fixed attachment addresses, which limits their flexibility and scalability.

Innovation Solution

The system generates memory references that are independent of the memory's accessibility, using tagging and extra machine instructions to manage access to persistent memory regions, allowing them to be attached to multiple hosts and re-established across reboots, by leveraging pointer-like references that translate and direct instruction execution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If local references or fixed attachment addresses are used for persistent memory, then address translation can be established within a single host, but the system cannot access persistent memory across multiple hosts or after reboots

Engineering Contradiction:
Improveaccessibility across hosts and rebootsVSAvoidmemory reference structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory reference is segmented into two distinct parts: a persistent memory region identifier and an offset within that region. This segmentation allows the reference to be independently interpreted by different hosts while maintaining precise location accuracy. Each host can map the region identifier to its own address space, enabling cross-host accessibility without requiring complex global address translation mechanisms.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory reference structure is designed to be universal across multiple hosts and persistence cycles. By using region identifiers rather than host-specific addresses, the same reference format can be used whether accessing memory locally, remotely, before or after reboots. This multi-functional design eliminates the need for separate reference mechanisms for different access scenarios.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Speed

If persistent memory is accessed using traditional I/O methods (read block via SCSI adapter), then data can be retrieved from storage, but access speed and efficiency are significantly reduced

Engineering Contradiction:
Improvememory access speedVSAvoidaccess mechanism
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary translation layer that converts high-level memory references into host-specific address translations. This intermediary mechanism enables direct memory access semantics while supporting persistent memory's physical nature. The translation occurs through page table entries that map persistent memory regions to volatile memory address spaces, allowing CPUs to use standard load/store instructions rather than slow I/O operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the mechanical I/O system (SCSI adapters, block reads) with a memory-mapped access system. By mapping persistent memory regions into the CPU's address space, the system substitutes slow storage I/O operations with fast memory access instructions. The CPU executes standard load and store operations that are dramatically faster than traditional storage access, while the underlying persistent memory retains its non-volatile characteristics.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Productivity

If memory references are generated relative to host address space, then access is efficient within a single host, but the references cannot be used by other hosts or after reboots

Engineering Contradiction:
Improveaccess efficiencyVSAvoidreference portability
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The reference is divided into a portable region identifier component and a local offset component. The region identifier remains constant across hosts and persistence cycles, while the offset provides host-specific positioning within that region. This segmentation allows the reference to maintain both portability (through the persistent region ID) and access efficiency (through the local offset that maps directly to host address space).

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The region identifier acts as an intermediary between the portable reference and host-specific address spaces. Different hosts can independently map the same region identifier to their own address spaces, enabling the reference to be portable while maintaining efficient local access. The offset serves as a mediator that translates the region-relative position into host-specific addresses without losing the portable reference structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11036431B2Accessing persistent memory via load and store
Publication Date: 2021.06.15 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11036431B2 patent drawing
  • US11036431B2 patent drawing
  • US11036431B2 patent drawing

AI summary

A system for generating memory references is provided. Instructions to perform a memory data operation on a database from a computer system is received. A computing system generates a memory reference in a region of memory, wherein the memory reference is independent of where the memory is accessible by a computing system. A memory reference to a memory region on a database is stored by a computing system. A memory reference based, at least, on the memory data operation is translated. A data in the memory via the instruction to perform a memory data operation is accessed. A memory data from the database is retrieved.