Persistent Page Cache Using 3D Crosspoint Memory

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Solution Overview

Problem

Existing data caching systems in computer systems face challenges such as volatility leading to frequent data copying and flushing, limited capacity, and performance overhead due to the use of volatile page caches, which consume precious memory and incur latency and overhead in managing persistence.

Innovation Solution

Implementing a persistent page cache in 3D crosspoint memory or other persistent memory technologies that provides both CPU addressability and persistence, reducing the need for frequent data copying and flushing, and enabling efficient journaling for transactional file systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a volatile page cache is used to cache storage data, then data access speed is improved, but data persistence is lost requiring frequent copying and flushing

Engineering Contradiction:
Improvedata access speedVSAvoiddata persistence
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent changes the fundamental parameter of memory volatility by using persistent memory (such as 3D crosspoint memory) instead of volatile memory for the page cache. This allows the cache to maintain both high-speed access characteristics and data persistence, eliminating the need for frequent flushing to storage devices while preserving data after system reboots.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates a composite caching system that combines the speed characteristics of volatile memory with the persistence characteristics of non-volatile storage. By using persistent memory technology that exhibits both fast access speeds and non-volatile properties, the system achieves a composite effect that resolves the contradiction between speed and reliability.

Inventive Principle:
Principle #40Composite materials

2Reliability

If a persistent page cache is implemented, then data persistence is improved, but memory capacity is consumed

Engineering Contradiction:
Improvedata persistenceVSAvoidmemory capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent segments the memory hierarchy into distinct functional zones: a persistent page cache in persistent memory for frequently accessed data requiring persistence, and application data in volatile memory for high-performance computing. This segmentation allows each region to be optimized for its specific purpose while managing overall memory capacity efficiently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent adds a new dimension to the memory hierarchy by introducing persistent memory as an intermediate layer between volatile memory and storage devices. This creates a multi-dimensional memory architecture that expands capacity while providing persistence, allowing the system to cache more data persistently without consuming all volatile memory capacity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Loss of time

If volatile memory is used for page cache, then data access latency is reduced, but memory management overhead increases

Engineering Contradiction:
Improvedata access latencyVSAvoidmemory management overhead
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent enables the persistent page cache to serve itself by maintaining data persistence inherently through the persistent memory medium. The system does not require complex external management mechanisms for flushing and copying data to storage devices, as the persistence is built into the memory technology itself, thereby reducing management overhead while maintaining low latency.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP3382557B1Method and apparatus for persistently caching storage data in a page cache
Publication Date: 2021.05.19 INTEL CORP
  • EP3382557B1 patent drawingFigure 1
  • EP3382557B1 patent drawingFigure 2
  • EP3382557B1 patent drawingFigure 3

AI summary

In one embodiment, an apparatus comprises a memory to store executable instructions of an operating system and a processor to identify a request for data from an application; determine whether a persistent page cache stores a copy of the data, wherein the persistent page cache is directly addressable by the processor and is to cache data of a storage device that is not directly addressable by the processor; and access the data from the persistent page cache.