Persistent Transfer Register for Storage Bus Overhead Reduction

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Solution Overview

Problem

In non-volatile storage systems, particularly solid-state storage devices, the existing data transfer protocols result in significant bus overhead due to the need for repeated commands to set block transfer sizes before each multiple block read or write operation, leading to inefficiencies and increased delay.

Innovation Solution

The implementation of a persistent transfer register that stores the block transfer size and reuses it for subsequent multiple block read or write commands, reducing the need for repeated bus transactions and minimizing bus activity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If repeated commands are sent to set block transfer size before each multiple block read or write operation, then the data transfer protocol is followed, but bus overhead increases and transfer efficiency decreases

Engineering Contradiction:
Improveprotocol complianceVSAvoiddata transfer efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by pre-loading the block transfer size into a persistent transfer register before the actual data transfer operations. This allows the bus to send fewer commands since the transfer size is already established and reused for multiple block transfers, reducing bus overhead while maintaining protocol compliance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a persistent transfer register as an intermediary component between the host and storage device. This register acts as a mediator that stores the block transfer size locally, eliminating the need for repeated bus commands to specify the same parameter, thus reducing bus activity while ensuring protocol requirements are met.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If block transfer size is specified in each command, then protocol requirements are met, but bus activity increases causing delays

Engineering Contradiction:
Improvecommand protocol adherenceVSAvoidbus transfer delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The block transfer size is preliminarily established and stored in the persistent transfer register before actual data transfers occur. This preliminary action eliminates the need to repeatedly specify the same transfer size in subsequent commands, reducing bus activity and associated delays while maintaining protocol adherence.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The persistent transfer register provides self-service by automatically retaining the block transfer size information across multiple commands. This eliminates the need for the host to repeatedly send the same parameter, allowing the system to serve itself by reusing previously established transfer parameters, thereby reducing bus delays.

Inventive Principle:
Principle #25Self-service

3Productivity

If bus overhead is reduced by reusing transfer size, then transfer performance improves, but protocol compatibility may be compromised

Engineering Contradiction:
Improvedata transfer performanceVSAvoidprotocol compatibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The persistent transfer register serves as an intermediary that bridges protocol compatibility and performance optimization. It allows the system to reduce bus overhead by reusing transfer sizes while maintaining compatibility with protocols that expect size specifications, as the register can be initialized according to protocol requirements and then reused for performance gains.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the state of the transfer size parameter from transient (reset with each command) to persistent (retained across commands). This parameter change enables performance improvement through reduced bus activity while maintaining protocol compatibility by allowing the parameter to be initially set according to protocol specifications.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8751728B1Storage system bus transfer optimization
Publication Date: 2014.06.10 WESTERN DIGITAL TECHNOLOGIES INC
  • US8751728B1 patent drawing
  • US8751728B1 patent drawing
  • US8751728B1 patent drawing

AI summary

Embodiments of the invention include systems and methods for reducing bus transfers for a storage device. In particular, these systems and methods reduce bus transfers by modifying an interface transfer protocol which designates the size of a multiple block read or write command is transmitted in a separate block transfer size command. Separate block transfer size commands can be omitted where the storage device maintains a record of a previously used block transfer size and reuses the size for subsequent multiple block read or write commands.