Semiconductor PFA Fault Localization Using GDS Cross-Layer Hotspots
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Solution Overview
Problem
Conventional physical failure analysis (PFA) techniques in semiconductor manufacturing are time-intensive and imprecise, as they require extensive manual processes to locate failure regions due to the inability to precisely identify systematic hotspots in semiconductor dies.
Innovation Solution
A systematic fault localization system utilizing GDS-assisted navigation and machine learning to decompose cross-layer patterns, enabling precise identification of systematic hotspots within sub-regions of semiconductor dies, reducing the search area by 5000x and enhancing analysis efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional PFA techniques are used to identify failure regions, then failure analysis can be performed, but the analysis cycle time is excessively long and precision is low
Solution Approach 1:
The system performs preliminary electrical diagnosis and GDS data preparation before physical failure analysis. By pre-processing the data and identifying potential failure regions through electrical testing and design data correlation, the system reduces the area requiring physical analysis, thereby shortening the overall PFA cycle time while improving localization precision.
Solution Approach 2:
The system creates a virtual model of the semiconductor device by integrating GDS design data with electrical test data. This virtual model allows for simulated failure analysis and hotspot identification without physical intervention, enabling precise failure region localization before actual physical analysis begins.
2Reliability
If manual net tracing and physical delayering are performed over large regions, then root cause can be determined, but the process becomes extremely time-intensive
Solution Approach 1:
The system segments the semiconductor device into multiple analysis units based on GDS design data and electrical test results. By dividing the large device area into smaller functional blocks and analyzing them independently, the system maintains root cause identification accuracy while significantly reducing the time required for manual net tracing and physical delayering.
Solution Approach 2:
The system replaces manual mechanical processes (physical delayering, manual net tracing) with automated computational methods. By using algorithms to process GDS data and electrical test data, the system identifies failure regions and root causes without time-consuming physical manipulation, thereby improving productivity while maintaining reliability.
3Measurement precision
If engineers use judgment to select PFA samples, then samples can be chosen for analysis, but the process lacks systematic precision and requires large analysis regions
Solution Approach 1:
The system implements a feedback mechanism where electrical test results are continuously correlated with GDS design data to refine failure region identification. By iteratively comparing test data with design specifications and adjusting the analysis model accordingly, the system achieves high-precision hotspot localization without requiring overly complex manual intervention.
Solution Approach 2:
The system creates a universal analysis framework that integrates multiple data sources (GDS data, electrical test data, failure data) into a single comprehensive model. This multi-functional approach allows the same system to perform design validation, failure analysis, and hotspot identification, reducing the need for separate complex procedures while improving precision.
Data Source
AI summary
Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.