PFC Burst-Mode Control Using DC-Link Load Estimation

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Solution Overview

Problem

Existing PFC circuits face inefficiencies and poor output voltage regulation during light load conditions, leading to switching losses and parasitic effects, and require additional sensing circuitry to estimate load demand accurately.

Innovation Solution

A PFC circuit operates in burst mode with a controller that preloads the voltage regulator control loop with an initial value based on the rate of change of the DC link voltage and capacitance, estimating load conditions to optimize switching and reduce harmonic distortion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a typical PFC circuit operates under light load conditions, then switching losses and AC losses remain relatively constant, but efficiency deteriorates and output voltage regulation becomes poor

Engineering Contradiction:
Improveswitching lossesVSAvoidoutput voltage regulation
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The PFC circuit operates in burst mode, periodically enabling and disabling the power stage based on DC link voltage thresholds. This periodic operation reduces switching losses during light load conditions while maintaining output voltage regulation through controlled bursts of power conversion activity.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The controller preloads the voltage regulator control loop with an initial value corresponding to initial conditions of the circuit current load before burst mode activation. This preliminary action ensures accurate load estimation and prevents voltage overshoot/undershoot when transitioning into and out of burst mode.

Inventive Principle:
Principle #10Preliminary action

2Object-generated harmful factors

If the voltage regulator control loop operates slowly to maintain sinusoidal current shape, then Total Harmonic Distortion is reduced, but response time increases to 10 times the AC mains period

Engineering Contradiction:
ImproveTotal Harmonic DistortionVSAvoidresponse time
Core Design Contradiction:
Object-generated harmful factorsVSSpeed

Solution Approach 1:

The controller preloads the voltage regulator control loop with an initial value corresponding to initial conditions of the circuit current load. This preliminary action allows the slow control loop to respond appropriately to load changes without introducing distortion, as the initial conditions are already optimized for the expected load scenario.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If additional sensing circuitry is added to estimate load demand accurately, then measurement precision improves, but device complexity increases

Engineering Contradiction:
Improveload demand estimationVSAvoidsensing circuitry
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The PFC circuit uses its existing DC link voltage sensing capability to estimate light load conditions and preload the control loop. This self-service approach eliminates the need for additional current sensing circuitry or complex load estimation hardware, maintaining measurement precision while avoiding increased device complexity.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances efficiency and reduces voltage overshoot/undershoot, maintaining stable AC input current and efficient operation during light loads without additional sensing circuitry.

Implementation Method 1

a direct current link having at least one capacitor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS12567813B2Method of power factor correction burst mode load measurement and control
Publication Date: 2026.03.03 VITESCO TECHNOLOGIES USA LLC
  • US12567813B2 patent drawing
  • US12567813B2 patent drawing
  • US12567813B2 patent drawing

AI summary

A power factor correction (PFC) circuit is provided. The PFC circuit includes an input for receiving alternating current and a converter for converting the received alternating current to a direct current. The PFC circuit also includes a direct current link that includes at least one capacitor. Additionally, the PFC circuit includes a voltage regulator control loop operating in burst mode under light load conditions by switching between an ON-state and an OFF-state periodically. The PFC circuit also includes a controller preloading the voltage regulator control loop with an initial value corresponding to the circuit current load under light conditions, when the voltage regulator control loop is transitioning to an ON-state of the burst mode. The initial value is based on the rate of change of the voltage at the direct current link and the capacitance of the capacitor of the direct current link.